From patchwork Tue Dec 13 06:16:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton Blanchard X-Patchwork-Id: 130993 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 1D64D1007F5 for ; Tue, 13 Dec 2011 17:17:09 +1100 (EST) Received: from kryten (ppp121-44-32-91.lns20.syd6.internode.on.net [121.44.32.91]) (using TLSv1 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPSA id 661351007D3; Tue, 13 Dec 2011 17:17:02 +1100 (EST) Date: Tue, 13 Dec 2011 17:16:36 +1100 From: Anton Blanchard To: benh@kernel.crashing.org, paulus@samba.org Subject: [PATCH] powerpc: Fix comment explaining our VSID layout Message-ID: <20111213171636.3e8b8ac6@kryten> X-Mailer: Claws Mail 3.7.8 (GTK+ 2.24.4; i686-pc-linux-gnu) Mime-Version: 1.0 Cc: linuxppc-dev@lists.ozlabs.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org We support 16TB of user address space and half a million contexts so update the comment to reflect this. Signed-off-by: Anton Blanchard Index: linux-powerpc/arch/powerpc/include/asm/mmu-hash64.h =================================================================== --- linux-powerpc.orig/arch/powerpc/include/asm/mmu-hash64.h 2011-12-13 14:47:14.498301148 +1100 +++ linux-powerpc/arch/powerpc/include/asm/mmu-hash64.h 2011-12-13 14:58:01.085510915 +1100 @@ -312,10 +312,9 @@ extern void slb_set_size(u16 size); * (i.e. everything above 0xC000000000000000), except the very top * segment, which simplifies several things. * - * - We allow for 15 significant bits of ESID and 20 bits of - * context for user addresses. i.e. 8T (43 bits) of address space for - * up to 1M contexts (although the page table structure and context - * allocation will need changes to take advantage of this). + * - We allow for 16 significant bits of ESID and 19 bits of + * context for user addresses. i.e. 16T (44 bits) of address space for + * up to half a million contexts. * * - The scramble function gives robust scattering in the hash * table (at least based on some initial results). The previous