| Message ID | 1660713867-26921-1-git-send-email-shengjiu.wang@nxp.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | ASoC: fsl_sai: Remove unnecessary FIFO reset in ISR | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/github-powerpc_kernel_qemu | fail | kernel (ppc64le_defconfig, korg-5.5.0, ppc64le) failed at step build. |
| snowpatch_ozlabs/github-powerpc_sparse | success | Successfully ran 4 jobs. |
| snowpatch_ozlabs/github-powerpc_clang | fail | kernel (corenet64_smp, ubuntu-21.10, ppc64) failed at step build. |
On Tue, Aug 16, 2022 at 10:41 PM Shengjiu Wang <shengjiu.wang@nxp.com> wrote: > > The FIFO reset drops the words in the FIFO, which may cause > channel swap when SAI module is running, especially when the > DMA speed is low. So it is not good to do FIFO reset in ISR, > then remove the operation. I don't recall the details of adding this many years ago, but leaving underrun/overrun errors unhandled does not sound right to me either. Would it result in a channel swap also? Perhaps there needs to be a reset routine that stops and restarts the DMA as well?
On Wed, Aug 17, 2022 at 2:21 PM Nicolin Chen <nicoleotsuka@gmail.com> wrote: > On Tue, Aug 16, 2022 at 10:41 PM Shengjiu Wang <shengjiu.wang@nxp.com> > wrote: > > > > The FIFO reset drops the words in the FIFO, which may cause > > channel swap when SAI module is running, especially when the > > DMA speed is low. So it is not good to do FIFO reset in ISR, > > then remove the operation. > > I don't recall the details of adding this many years ago, but > leaving underrun/overrun errors unhandled does not sound right > to me either. Would it result in a channel swap also? Perhaps > there needs to be a reset routine that stops and restarts the > DMA as well? > Remove the reset, the channel swap is gone. IMO, no need to handle the underrun/overrun in driver, the SAI hardware can handle the read/write pointer itself when xrun happen, and we don't need reset routine. For ESAI, because it can't handle read/write pointer correctly when xrun happen, so we need reset routine. Best regards Wang shengjiu
On Tue, Aug 16, 2022 at 11:29 PM Shengjiu Wang <shengjiu.wang@gmail.com> wrote: >> > The FIFO reset drops the words in the FIFO, which may cause >> > channel swap when SAI module is running, especially when the >> > DMA speed is low. So it is not good to do FIFO reset in ISR, >> > then remove the operation. >> >> I don't recall the details of adding this many years ago, but >> leaving underrun/overrun errors unhandled does not sound right >> to me either. Would it result in a channel swap also? Perhaps >> there needs to be a reset routine that stops and restarts the >> DMA as well? > > > Remove the reset, the channel swap is gone. I have no doubt about that :) > IMO, no need to handle the underrun/overrun in driver, the SAI > hardware can handle the read/write pointer itself when xrun happen, > and we don't need reset routine. That'd be okay then.
On Wed, 17 Aug 2022 13:24:27 +0800, Shengjiu Wang wrote: > The FIFO reset drops the words in the FIFO, which may cause > channel swap when SAI module is running, especially when the > DMA speed is low. So it is not good to do FIFO reset in ISR, > then remove the operation. > > Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: fsl_sai: Remove unnecessary FIFO reset in ISR commit: cb225ac125a9c82889f4796a6092dd0bed39720a All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index d430eece1d6b..a7fa6f0bf83d 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -114,11 +114,8 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid) if (flags & FSL_SAI_CSR_SEF) dev_dbg(dev, "isr: Tx Frame sync error detected\n"); - if (flags & FSL_SAI_CSR_FEF) { + if (flags & FSL_SAI_CSR_FEF) dev_dbg(dev, "isr: Transmit underrun detected\n"); - /* FIFO reset for safety */ - xcsr |= FSL_SAI_CSR_FR; - } if (flags & FSL_SAI_CSR_FWF) dev_dbg(dev, "isr: Enabled transmit FIFO is empty\n"); @@ -148,11 +145,8 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid) if (flags & FSL_SAI_CSR_SEF) dev_dbg(dev, "isr: Rx Frame sync error detected\n"); - if (flags & FSL_SAI_CSR_FEF) { + if (flags & FSL_SAI_CSR_FEF) dev_dbg(dev, "isr: Receive overflow detected\n"); - /* FIFO reset for safety */ - xcsr |= FSL_SAI_CSR_FR; - } if (flags & FSL_SAI_CSR_FWF) dev_dbg(dev, "isr: Enabled receive FIFO is full\n");
The FIFO reset drops the words in the FIFO, which may cause channel swap when SAI module is running, especially when the DMA speed is low. So it is not good to do FIFO reset in ISR, then remove the operation. Fixes: e2681a1bf5ae ("ASoC: fsl_sai: Add isr to deal with error flag") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> --- sound/soc/fsl/fsl_sai.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)