| Message ID | 1593595262-1433-4-git-send-email-atrajeev@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | powerpc/perf: Add support for power10 PMU Hardware | expand |
Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes: > From: Madhavan Srinivasan <maddy@linux.ibm.com> > > PowerISA v3.1 added three new perfromance > monitoring unit (PMU) speical purpose register (SPR). > They are Monitor Mode Control Register 3 (MMCR3), > Sampled Instruction Event Register 2 (SIER2), > Sampled Instruction Event Register 3 (SIER3). > > Patch here adds a new dump function dump_310_sprs > to print these SPR values. > > Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> > --- > arch/powerpc/xmon/xmon.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c > index 7efe4bc..8917fe8 100644 > --- a/arch/powerpc/xmon/xmon.c > +++ b/arch/powerpc/xmon/xmon.c > @@ -2022,6 +2022,20 @@ static void dump_300_sprs(void) > #endif > } > > +static void dump_310_sprs(void) > +{ > +#ifdef CONFIG_PPC64 > + if (!cpu_has_feature(CPU_FTR_ARCH_31)) > + return; > + > + printf("mmcr3 = %.16lx\n", > + mfspr(SPRN_MMCR3)); > + > + printf("sier2 = %.16lx sier3 = %.16lx\n", > + mfspr(SPRN_SIER2), mfspr(SPRN_SIER3)); Why not all on one line like many of the others? cheers
> On 08-Jul-2020, at 4:34 PM, Michael Ellerman <mpe@ellerman.id.au> wrote: > > Athira Rajeev <atrajeev@linux.vnet.ibm.com <mailto:atrajeev@linux.vnet.ibm.com>> writes: >> From: Madhavan Srinivasan <maddy@linux.ibm.com> >> >> PowerISA v3.1 added three new perfromance >> monitoring unit (PMU) speical purpose register (SPR). >> They are Monitor Mode Control Register 3 (MMCR3), >> Sampled Instruction Event Register 2 (SIER2), >> Sampled Instruction Event Register 3 (SIER3). >> >> Patch here adds a new dump function dump_310_sprs >> to print these SPR values. >> >> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> >> --- >> arch/powerpc/xmon/xmon.c | 15 +++++++++++++++ >> 1 file changed, 15 insertions(+) >> >> diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c >> index 7efe4bc..8917fe8 100644 >> --- a/arch/powerpc/xmon/xmon.c >> +++ b/arch/powerpc/xmon/xmon.c >> @@ -2022,6 +2022,20 @@ static void dump_300_sprs(void) >> #endif >> } >> >> +static void dump_310_sprs(void) >> +{ >> +#ifdef CONFIG_PPC64 >> + if (!cpu_has_feature(CPU_FTR_ARCH_31)) >> + return; >> + >> + printf("mmcr3 = %.16lx\n", >> + mfspr(SPRN_MMCR3)); >> + >> + printf("sier2 = %.16lx sier3 = %.16lx\n", >> + mfspr(SPRN_SIER2), mfspr(SPRN_SIER3)); > > Why not all on one line like many of the others? Sure, will change this to one line Thanks Athira > > cheers
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 7efe4bc..8917fe8 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -2022,6 +2022,20 @@ static void dump_300_sprs(void) #endif } +static void dump_310_sprs(void) +{ +#ifdef CONFIG_PPC64 + if (!cpu_has_feature(CPU_FTR_ARCH_31)) + return; + + printf("mmcr3 = %.16lx\n", + mfspr(SPRN_MMCR3)); + + printf("sier2 = %.16lx sier3 = %.16lx\n", + mfspr(SPRN_SIER2), mfspr(SPRN_SIER3)); +#endif +} + static void dump_one_spr(int spr, bool show_unimplemented) { unsigned long val; @@ -2076,6 +2090,7 @@ static void super_regs(void) dump_206_sprs(); dump_207_sprs(); dump_300_sprs(); + dump_310_sprs(); return; }