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[v2,03/23] ata: sata_dwc_460ex: set dma_boundary to 0x1fff

Message ID 1461661404-1952-4-git-send-email-andriy.shevchenko@linux.intel.com (mailing list archive)
State Not Applicable
Headers show

Commit Message

Andy Shevchenko April 26, 2016, 9:03 a.m. UTC 
The original code states:

	Make sure a LLI block is not created that will span 8K max FIS
	boundary. If the block spans such a FIS boundary, there is a chance
	that a DMA burst will cross that boundary -- this results in an error
	in the host controller.

Since we have switched to generic DMAengine API we satisfy above by setting
dma_boundary value to 0x1fff.

Suggested-by: Mans Rullgard <mans@mansr.com>
Tested-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/ata/sata_dwc_460ex.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Tejun Heo May 8, 2016, 7:41 p.m. UTC | #1 
On Tue, Apr 26, 2016 at 12:03:04PM +0300, Andy Shevchenko wrote:
> diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
> index 7f95389..aee8873 100644
> --- a/drivers/ata/sata_dwc_460ex.c
> +++ b/drivers/ata/sata_dwc_460ex.c
> @@ -1151,7 +1151,13 @@ static struct scsi_host_template sata_dwc_sht = {
>  	 */
>  	.sg_tablesize		= LIBATA_MAX_PRD,
>  	/* .can_queue		= ATA_MAX_QUEUE, */
> -	.dma_boundary		= ATA_DMA_BOUNDARY,
> +	/*
> +	 * Make sure a LLI block is not created that will span 8K max FIS
> +	 * boundary. If the block spans such a FIS boundary, there is a chance
> +	 * that a DMA burst will cross that boundary -- this results in an
> +	 * error in the host controller.
> +	 */
> +	.dma_boundary		= 0x1fff /* ATA_DMA_BOUNDARY */,

The host controller can't cross 8k boundary?  Is this for real?
Måns Rullgård May 8, 2016, 9:25 p.m. UTC | #2 
Tejun Heo <tj@kernel.org> writes:

> On Tue, Apr 26, 2016 at 12:03:04PM +0300, Andy Shevchenko wrote:
>> diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
>> index 7f95389..aee8873 100644
>> --- a/drivers/ata/sata_dwc_460ex.c
>> +++ b/drivers/ata/sata_dwc_460ex.c
>> @@ -1151,7 +1151,13 @@ static struct scsi_host_template sata_dwc_sht = {
>>  	 */
>>  	.sg_tablesize		= LIBATA_MAX_PRD,
>>  	/* .can_queue		= ATA_MAX_QUEUE, */
>> -	.dma_boundary		= ATA_DMA_BOUNDARY,
>> +	/*
>> +	 * Make sure a LLI block is not created that will span 8K max FIS
>> +	 * boundary. If the block spans such a FIS boundary, there is a chance
>> +	 * that a DMA burst will cross that boundary -- this results in an
>> +	 * error in the host controller.
>> +	 */
>> +	.dma_boundary		= 0x1fff /* ATA_DMA_BOUNDARY */,
>
> The host controller can't cross 8k boundary?  Is this for real?

From the manual:

  DMA block and burst transaction sizes are critical for DMA operation.
  (Also see the definition of "DMA transfer".)  These sizes should be
  selected properly to ensure error-free bus transfers. It is required
  that the DMA write burst transfer does not cross the 8192-byte Data
  FIS boundary, because the Transport Layer maintains the DMA state for
  the duration of the Data FIS transmission.
diff mbox

Patch

diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
index 7f95389..aee8873 100644
--- a/drivers/ata/sata_dwc_460ex.c
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -1151,7 +1151,13 @@  static struct scsi_host_template sata_dwc_sht = {
 	 */
 	.sg_tablesize		= LIBATA_MAX_PRD,
 	/* .can_queue		= ATA_MAX_QUEUE, */
-	.dma_boundary		= ATA_DMA_BOUNDARY,
+	/*
+	 * Make sure a LLI block is not created that will span 8K max FIS
+	 * boundary. If the block spans such a FIS boundary, there is a chance
+	 * that a DMA burst will cross that boundary -- this results in an
+	 * error in the host controller.
+	 */
+	.dma_boundary		= 0x1fff /* ATA_DMA_BOUNDARY */,
 };
 
 static struct ata_port_operations sata_dwc_ops = {