From patchwork Fri Mar 2 09:35:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 144181 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 71C65100C3A for ; Fri, 2 Mar 2012 20:52:08 +1100 (EST) Received: by ozlabs.org (Postfix) id 2BB0F100801; Fri, 2 Mar 2012 20:36:30 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "e23smtp08.au.ibm.com", Issuer "GeoTrust SSL CA" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 1863A1007E1 for ; Fri, 2 Mar 2012 20:36:30 +1100 (EST) Received: from /spool/local by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 2 Mar 2012 09:34:11 +1000 Received: from d23relay04.au.ibm.com (202.81.31.246) by e23smtp08.au.ibm.com (202.81.31.205) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Fri, 2 Mar 2012 09:33:51 +1000 Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay04.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q229UYHP3035138 for ; Fri, 2 Mar 2012 20:30:37 +1100 Received: from d23av04.au.ibm.com (loopback [127.0.0.1]) by d23av04.au.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q229a50S005270 for ; Fri, 2 Mar 2012 20:36:05 +1100 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.190.163.12]) by d23av04.au.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id q229a4qJ005245; Fri, 2 Mar 2012 20:36:05 +1100 Received: from grosgo.ozlabs.ibm.com (haven.au.ibm.com [9.190.164.82]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id EC83673A09; Fri, 2 Mar 2012 20:36:04 +1100 (EST) From: Benjamin Herrenschmidt To: linuxppc-dev@ozlabs.org Subject: [PATCH 05/12] powerpc: Improve behaviour of irq tracing on 64-bit exception entry Date: Fri, 2 Mar 2012 20:35:15 +1100 Message-Id: <1330680922-6894-6-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 1.7.9 In-Reply-To: <1330680922-6894-1-git-send-email-benh@kernel.crashing.org> References: <1330680922-6894-1-git-send-email-benh@kernel.crashing.org> x-cbid: 12030123-5140-0000-0000-000000D70D56 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Some exceptions would unconditionally disable interrupts on entry, which is fine, but calling lockdep every time not only adds more overhead than strictly needed, but also means we get quite a few "redudant" disable logged, which makes it hard to spot the really bad ones. So instead, split the macro used by the exception code into a normal one and a separate one used when CONFIG_TRACE_IRQFLAGS is enabled, and make the later skip th tracing if interrupts were already disabled. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/exception-64s.h | 25 ++++++++++++++++++++++--- 1 files changed, 22 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index bdc9eeb..7f4718c 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h @@ -272,15 +272,34 @@ label##_hv: \ _MASKABLE_EXCEPTION_PSERIES(vec, label, \ EXC_HV, SOFTEN_TEST_HV) +/* + * Our exception common code can be passed various "additions" + * to specify the behaviour of interrupts, whether to kick the + * runlatch, etc... + */ + +/* Exception addition: Hard disable interrupts */ +#ifdef CONFIG_TRACE_IRQFLAGS #define DISABLE_INTS \ + lbz r10,PACASOFTIRQEN(r13); \ li r11,0; \ - stb r11,PACASOFTIRQEN(r13); \ + cmpwi cr0,r10,0; \ stb r11,PACAHARDIRQEN(r13); \ - TRACE_DISABLE_INTS + beq 44f; \ + stb r11,PACASOFTIRQEN(r13); \ + TRACE_DISABLE_INTS; \ +44: +#else +#define DISABLE_INTS \ + li r11,0; \ + stb r11,PACASOFTIRQEN(r13); \ + stb r11,PACAHARDIRQEN(r13) +#endif /* CONFIG_TRACE_IRQFLAGS */ +/* Exception addition: Keep interrupt state */ #define ENABLE_INTS \ - ld r12,_MSR(r1); \ mfmsr r11; \ + ld r12,_MSR(r1); \ rlwimi r11,r12,0,MSR_EE; \ mtmsrd r11,1