From patchwork Tue Apr 19 06:04:05 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 91919 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 7ADA2B7047 for ; Tue, 19 Apr 2011 16:04:57 +1000 (EST) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by ozlabs.org (Postfix) with ESMTP id 22C6EB6FF8; Tue, 19 Apr 2011 16:04:10 +1000 (EST) Received: from frontend1.mail.m-online.net (frontend1.mail.intern.m-online.net [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 6338A1824455; Tue, 19 Apr 2011 08:04:07 +0200 (CEST) X-Auth-Info: hVr/wMNLMwhusJ7r7ALl/eNZD3MFbmAqoPsueVM9f14= Received: from mail.denx.de (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 71FEC1C000E2; Tue, 19 Apr 2011 08:04:07 +0200 (CEST) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail.denx.de (Postfix) with ESMTP id 5292F41B9405; Tue, 19 Apr 2011 08:04:07 +0200 (CEST) Received: by pollux.denx.de (Postfix, from userid 515) id 0135F18563705; Tue, 19 Apr 2011 08:04:06 +0200 (CEST) From: Heiko Schocher To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH][RFC] mpc52xx, common: setup port_config and cdm settings through DTS Date: Tue, 19 Apr 2011 08:04:05 +0200 Message-Id: <1303193045-20111-1-git-send-email-hs@denx.de> X-Mailer: git-send-email 1.7.4.4 Cc: devictree-discuss@lists.ozlabs.org, Heiko Schocher , Grant Likely , Wolfgang Denk X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org If firmware does not setup the "GPS Port Configuration Register" and the "CDM 48MHz Fractional Divider Configuration Register", it can be corrected through DTS. Signed-off-by: Heiko Schocher cc: devictree-discuss@lists.ozlabs.org cc: linuxppc-dev@lists.ozlabs.org cc: Grant Likely cc: Wolfgang Denk --- .../devicetree/bindings/powerpc/fsl/mpc5200.txt | 16 +++++++++++ arch/powerpc/platforms/52xx/mpc52xx_common.c | 27 ++++++++++++++++++++ 2 files changed, 43 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt index 4ccb2cd..0c1c6c8 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt @@ -155,6 +155,9 @@ Each GPIO controller node should have the empty property gpio-controller and according to the bit numbers in the GPIO control registers. The second cell is for flags which is currently unused. +If firmware does not setup port_config correct, it can be modified +through the "fsl,init-port-config" property in the "fsl,mpc5200-gpio" node. + fsl,mpc5200-fec nodes --------------------- The FEC node can specify one of the following properties to configure @@ -196,3 +199,16 @@ External interrupts: fsl,mpc5200-mscan nodes ----------------------- See file can.txt in this directory. + +fsl,mpc5200-cdm nodes +--------------------- +- setup "CDM 48MHz Fractional Divider Configuration Register" + If firmware does not setup this register correct, you can + modify it with the following properties: + + - fsl,init-ext-48mhz-en + see MPC5200BUM Table 5-11 Bits 0-7 + - fsl,init-fd-enable + see MPC5200BUM Table 5-11 Bits 8-15 + - fsl,init-fd-counters + see MPC5200BUM Table 5-11 Bits 16-31 diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c index 41f3a7e..41099f3 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c @@ -136,6 +136,8 @@ void __init mpc52xx_map_common_devices(void) { struct device_node *np; + const u32 *prop; + int plen; /* mpc52xx_wdt is mapped here and used in mpc52xx_restart, * possibly from a interrupt context. wdt is only implement @@ -153,11 +155,36 @@ mpc52xx_map_common_devices(void) /* Clock Distribution Module, used by PSC clock setting function */ np = of_find_matching_node(NULL, mpc52xx_cdm_ids); mpc52xx_cdm = of_iomap(np, 0); + prop = of_get_property(np, "fsl,init-ext-48mhz-en", &plen); + if (prop) { + pr_debug("ext-48mhz-en: old:%x new:%x\n", + in_8(&mpc52xx_cdm->ext_48mhz_en), *prop); + out_8(&mpc52xx_cdm->ext_48mhz_en, *prop); + } + prop = of_get_property(np, "fsl,init-fd-enable", &plen); + if (prop) { + pr_debug("fd-enable: old:%x new:%x\n", + in_8(&mpc52xx_cdm->fd_enable), *prop); + out_8(&mpc52xx_cdm->fd_enable, *prop); + } + prop = of_get_property(np, "fsl,init-fd-counters", &plen); + if (prop) { + pr_debug("fd-counters: old:%x new:%x\n", + in_be16(&mpc52xx_cdm->fd_counters), *prop); + out_be16(&mpc52xx_cdm->fd_counters, *prop); + } of_node_put(np); /* simple_gpio registers */ np = of_find_matching_node(NULL, mpc52xx_gpio_simple); simple_gpio = of_iomap(np, 0); + /* fixup the port_config register */ + prop = of_get_property(np, "fsl,init-port-config", &plen); + if (prop) { + pr_info("port-config: old:%x new:%x\n", + in_be32(&simple_gpio->port_config), *prop); + out_be32(&simple_gpio->port_config, *prop); + } of_node_put(np); /* wkup_gpio registers */