Message ID | 1258304977-11760-5-git-send-email-Joakim.Tjernlund@transmode.se (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index a9f1ace..e70503d 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -705,7 +705,7 @@ start_here: */ initial_mmu: tlbia /* Invalidate all TLB entries */ -#ifdef CONFIG_PIN_TLB +#if 1 /* CONFIG_PIN_TLB */ lis r8, MI_RSV4I@h ori r8, r8, 0x1c00 #else
Various kernel asm modifies SRR0/SRR1 just before executing a rfi. If such code crosses a page boundary you risk a TLB miss which will clobber SRR0/SRR1. Avoid this by always pinning kernel instruction TLB space. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> --- arch/powerpc/kernel/head_8xx.S | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)