| Message ID | 20201011050908.72173-1-ravi.bangoria@linux.ibm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | powerpc/sstep: VSX 32-byte vector paired load/store instructions | expand |
On Sun, 11 Oct 2020 10:39:03 +0530, Ravi Bangoria wrote: > VSX vector paired instructions operates with octword (32-byte) > operand for loads and stores between storage and a pair of two > sequential Vector-Scalar Registers (VSRs). There are 4 word > instructions and 2 prefixed instructions that provides this > 32-byte storage access operations - lxvp, lxvpx, stxvp, stxvpx, > plxvp, pstxvp. > > [...] Applied to powerpc/next. [1/5] powerpc/sstep: Emulate prefixed instructions only when CPU_FTR_ARCH_31 is set https://git.kernel.org/powerpc/c/ef6879f8c8053cc3b493f400a06d452d7fb13650 [2/5] powerpc/sstep: Cover new VSX instructions under CONFIG_VSX https://git.kernel.org/powerpc/c/1817de2f141c718f1a0ae59927ec003e9b144349 [3/5] powerpc/sstep: Support VSX vector paired storage access instructions https://git.kernel.org/powerpc/c/af99da74333b06d97ea6a9a2cd8906244da4bb26 [4/5] powerpc/ppc-opcode: Add encoding macros for VSX vector paired instructions https://git.kernel.org/powerpc/c/6ce73ba7691555fd182bc68529dc03cbd4378f72 [5/5] powerpc/sstep: Add testcases for VSX vector paired load/store instructions https://git.kernel.org/powerpc/c/35785b293da0070a8df19b0193f0e7de6c9eaecb cheers
VSX vector paired instructions operates with octword (32-byte) operand for loads and stores between storage and a pair of two sequential Vector-Scalar Registers (VSRs). There are 4 word instructions and 2 prefixed instructions that provides this 32-byte storage access operations - lxvp, lxvpx, stxvp, stxvpx, plxvp, pstxvp. Emulation infrastructure doesn't have support for these instructions, to operate with 32-byte storage access and to operate with 2 VSX registers. This patch series enables the instruction emulation support and adds test cases for them respectively. v4: https://lore.kernel.org/r/20201008072726.233086-1-ravi.bangoria@linux.ibm.com Changes in v5: ------------- * Fix build breakage reported by Kernel test robote * Patch #2 is new. CONFIG_VSX check was missing for some VSX instructions. Patch #2 adds that check. Changes in v4: ------------- * Patch #1 is (kind of) new. * Patch #2 now enables both analyse_instr() and emulate_step() unlike prev series where both were in separate patches. * Patch #2 also has important fix for emulation on LE. * Patch #3 and #4. Added XSP/XTP, D0/D1 instruction operands, removed *_EX_OP, __PPC_T[P][X] macros which are incorrect, and adhered to PPC_RAW_* convention. * Added `CPU_FTR_ARCH_31` check in testcases to avoid failing in p8/p9. * Some consmetic changes. * Rebased to powerpc/next Changes in v3: ------------- Worked on review comments and suggestions from Ravi and Naveen, * Fix the do_vsx_load() to handle vsx instructions if MSR_FP/MSR_VEC cleared in exception conditions and it reaches to read/write to thread_struct member fp_state/vr_state respectively. * Fix wrongly used `__vector128 v[2]` in struct vsx_reg as it should hold a single vsx register size. * Remove unnecessary `VSX_CHECK_VEC` flag set and condition to check `VSX_LDLEFT` that is not applicable for these vsx instructions. * Fix comments in emulate_vsx_load() that were misleading. * Rebased on latest powerpc next branch. Changes in v2: ------------- * Fix suggestion from Sandipan, wrap ISA 3.1 instructions with cpu_has_feature(CPU_FTR_ARCH_31) check. Balamuruhan S (4): powerpc/sstep: Emulate prefixed instructions only when CPU_FTR_ARCH_31 is set powerpc/sstep: Support VSX vector paired storage access instructions powerpc/ppc-opcode: Add encoding macros for VSX vector paired instructions powerpc/sstep: Add testcases for VSX vector paired load/store instructions Ravi Bangoria (1): powerpc/sstep: Cover new VSX instructions under CONFIG_VSX arch/powerpc/include/asm/ppc-opcode.h | 13 ++ arch/powerpc/lib/sstep.c | 160 ++++++++++++--- arch/powerpc/lib/test_emulate_step.c | 270 ++++++++++++++++++++++++++ 3 files changed, 421 insertions(+), 22 deletions(-)