| Message ID | 20260326110948.68908-9-akhilrajeev@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add GPCDMA support in Tegra264 | expand |
On Thu, Mar 26, 2026 at 04:39:45PM +0530, Akhil R wrote: > Use 'iommu-map', when provided, to get the stream ID to be programmed > for each channel. Iterate over the channels registered and configure > each channel device separately using of_dma_configure_id() to allow > it to use a separate IOMMU domain for the transfer. But do this > in a second loop since the first loop populates the DMA device channels > list and async_device_register() registers the channels. Both are > prerequisites for using the channel device in the next loop. > > Channels will continue to use the same global stream ID if the > 'iommu-map' property is not present in the device tree. > > Signed-off-by: Akhil R <akhilrajeev@nvidia.com> > --- ... > @@ -1490,6 +1496,41 @@ static int tegra_dma_probe(struct platform_device *pdev) > return ret; > } > > + /* > + * Configure stream ID for each channel from the channels registered > + * above. This is done in a separate iteration to ensure that only > + * the channels available and registered for the DMA device are used. > + */ > + list_for_each_entry(chan, &tdma->dma_dev.channels, device_node) { > + chdev = &chan->dev->device; > + tdc = to_tegra_dma_chan(chan); > + > + if (use_iommu_map) { > + chdev->bus = pdev->dev.bus; > + dma_coerce_mask_and_coherent(chdev, DMA_BIT_MASK(cdata->addr_bits)); > + > + ret = of_dma_configure_id(chdev, pdev->dev.of_node, > + true, &tdc->id); > + if (ret) { > + dev_err(chdev, "Failed to configure IOMMU for channel %d: %d\n", > + tdc->id, ret); > + return ret; This is in probe funciton return dev_err_probe(); Frank
On Thu, 26 Mar 2026 16:26:03 -0400, Frank Li wrote: > On Thu, Mar 26, 2026 at 04:39:45PM +0530, Akhil R wrote: >> Use 'iommu-map', when provided, to get the stream ID to be programmed >> for each channel. Iterate over the channels registered and configure >> each channel device separately using of_dma_configure_id() to allow >> it to use a separate IOMMU domain for the transfer. But do this >> in a second loop since the first loop populates the DMA device channels >> list and async_device_register() registers the channels. Both are >> prerequisites for using the channel device in the next loop. >> >> Channels will continue to use the same global stream ID if the >> 'iommu-map' property is not present in the device tree. >> >> Signed-off-by: Akhil R <akhilrajeev@nvidia.com> >> --- > ... >> @@ -1490,6 +1496,41 @@ static int tegra_dma_probe(struct platform_device *pdev) >> return ret; >> } >> >> + /* >> + * Configure stream ID for each channel from the channels registered >> + * above. This is done in a separate iteration to ensure that only >> + * the channels available and registered for the DMA device are used. >> + */ >> + list_for_each_entry(chan, &tdma->dma_dev.channels, device_node) { >> + chdev = &chan->dev->device; >> + tdc = to_tegra_dma_chan(chan); >> + >> + if (use_iommu_map) { >> + chdev->bus = pdev->dev.bus; >> + dma_coerce_mask_and_coherent(chdev, DMA_BIT_MASK(cdata->addr_bits)); >> + >> + ret = of_dma_configure_id(chdev, pdev->dev.of_node, >> + true, &tdc->id); >> + if (ret) { >> + dev_err(chdev, "Failed to configure IOMMU for channel %d: %d\n", >> + tdc->id, ret); >> + return ret; > > This is in probe funciton > > return dev_err_probe(); Ack. I will update. Best Regards, Akhil
diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c index 9bea2ffb3b9e..3b377f34be58 100644 --- a/drivers/dma/tegra186-gpc-dma.c +++ b/drivers/dma/tegra186-gpc-dma.c @@ -15,6 +15,7 @@ #include <linux/module.h> #include <linux/of.h> #include <linux/of_dma.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/reset.h> #include <linux/slab.h> @@ -1380,9 +1381,13 @@ static int tegra_dma_program_sid(struct tegra_dma_channel *tdc, int stream_id) static int tegra_dma_probe(struct platform_device *pdev) { const struct tegra_dma_chip_data *cdata = NULL; + struct tegra_dma_channel *tdc; + struct tegra_dma *tdma; + struct dma_chan *chan; + struct device *chdev; + bool use_iommu_map = false; unsigned int i; u32 stream_id; - struct tegra_dma *tdma; int ret; cdata = of_device_get_match_data(&pdev->dev); @@ -1410,9 +1415,12 @@ static int tegra_dma_probe(struct platform_device *pdev) tdma->dma_dev.dev = &pdev->dev; - if (!tegra_dev_iommu_get_stream_id(&pdev->dev, &stream_id)) { - dev_err(&pdev->dev, "Missing iommu stream-id\n"); - return -EINVAL; + use_iommu_map = of_property_present(pdev->dev.of_node, "iommu-map"); + if (!use_iommu_map) { + if (!tegra_dev_iommu_get_stream_id(&pdev->dev, &stream_id)) { + dev_err(&pdev->dev, "Missing iommu stream-id\n"); + return -EINVAL; + } } ret = device_property_read_u32(&pdev->dev, "dma-channel-mask", @@ -1424,9 +1432,10 @@ static int tegra_dma_probe(struct platform_device *pdev) tdma->chan_mask = TEGRA_GPCDMA_DEFAULT_CHANNEL_MASK; } + /* Initialize vchan for each channel and populate the channels list */ INIT_LIST_HEAD(&tdma->dma_dev.channels); for (i = 0; i < cdata->nr_channels; i++) { - struct tegra_dma_channel *tdc = &tdma->channels[i]; + tdc = &tdma->channels[i]; /* Check for channel mask */ if (!(tdma->chan_mask & BIT(i))) @@ -1446,10 +1455,6 @@ static int tegra_dma_probe(struct platform_device *pdev) vchan_init(&tdc->vc, &tdma->dma_dev); tdc->vc.desc_free = tegra_dma_desc_free; - - /* program stream-id for this channel */ - tegra_dma_program_sid(tdc, stream_id); - tdc->stream_id = stream_id; } dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(cdata->addr_bits)); @@ -1483,6 +1488,7 @@ static int tegra_dma_probe(struct platform_device *pdev) tdma->dma_dev.device_synchronize = tegra_dma_chan_synchronize; tdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; + /* Register the DMA device and the channels */ ret = dmaenginem_async_device_register(&tdma->dma_dev); if (ret < 0) { dev_err_probe(&pdev->dev, ret, @@ -1490,6 +1496,41 @@ static int tegra_dma_probe(struct platform_device *pdev) return ret; } + /* + * Configure stream ID for each channel from the channels registered + * above. This is done in a separate iteration to ensure that only + * the channels available and registered for the DMA device are used. + */ + list_for_each_entry(chan, &tdma->dma_dev.channels, device_node) { + chdev = &chan->dev->device; + tdc = to_tegra_dma_chan(chan); + + if (use_iommu_map) { + chdev->bus = pdev->dev.bus; + dma_coerce_mask_and_coherent(chdev, DMA_BIT_MASK(cdata->addr_bits)); + + ret = of_dma_configure_id(chdev, pdev->dev.of_node, + true, &tdc->id); + if (ret) { + dev_err(chdev, "Failed to configure IOMMU for channel %d: %d\n", + tdc->id, ret); + return ret; + } + + if (!tegra_dev_iommu_get_stream_id(chdev, &stream_id)) { + dev_err(chdev, "Failed to get stream ID for channel %d\n", + tdc->id); + return -EINVAL; + } + + chan->dev->chan_dma_dev = true; + } + + /* program stream-id for this channel */ + tegra_dma_program_sid(tdc, stream_id); + tdc->stream_id = stream_id; + } + ret = devm_of_dma_controller_register(&pdev->dev, pdev->dev.of_node, tegra_dma_of_xlate, tdma); if (ret < 0) {
Use 'iommu-map', when provided, to get the stream ID to be programmed for each channel. Iterate over the channels registered and configure each channel device separately using of_dma_configure_id() to allow it to use a separate IOMMU domain for the transfer. But do this in a second loop since the first loop populates the DMA device channels list and async_device_register() registers the channels. Both are prerequisites for using the channel device in the next loop. Channels will continue to use the same global stream ID if the 'iommu-map' property is not present in the device tree. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> --- drivers/dma/tegra186-gpc-dma.c | 59 ++++++++++++++++++++++++++++------ 1 file changed, 50 insertions(+), 9 deletions(-)