| Message ID | 20260326110948.68908-11-akhilrajeev@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show
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Add GPCDMA support in Tegra264
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expand
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diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi index 7e2c3e66c2ab..58cd81bc33d7 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi @@ -9,6 +9,10 @@ aliases { }; bus@0 { + dma-controller@8400000 { + status = "okay"; + }; + serial@c4e0000 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi index af077420d7d9..b2f20d4b567a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi @@ -3244,6 +3244,7 @@ gpcdma: dma-controller@8400000 { <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; iommus = <&smmu1 0x00000800>; + iommu-map = <1 &smmu1 0x801 31>; dma-coherent; dma-channel-mask = <0xfffffffe>; status = "disabled";
Enable GPCDMA in Tegra264 and add the iommu-map property so that each channel uses a separate stream ID and gets its own IOMMU domain for memory. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 4 ++++ arch/arm64/boot/dts/nvidia/tegra264.dtsi | 1 + 2 files changed, 5 insertions(+)