| Message ID | 20251008073046.23231-2-clamor95@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | tegra-video: add CSI support for Tegra20 and Tegra30 | expand |
On Wed, Oct 8, 2025 at 9:31 AM Svyatoslav Ryhel <clamor95@gmail.com> wrote: > Add csus_mux for further use as the csus clock parent, similar to how the > cdev1 and cdev2 muxes are utilized. Additionally, constify the cdev parent > name lists to resolve checkpatch warnings. > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> This patch looks like it can be applied independently from the rest, can I get a review from Thierry or someone else at nVidia so I can just apply it? Yours, Linus Walleij
On Monday, October 13, 2025 10:12 PM Linus Walleij wrote: > On Wed, Oct 8, 2025 at 9:31 AM Svyatoslav Ryhel <clamor95@gmail.com> wrote: > > > Add csus_mux for further use as the csus clock parent, similar to how the > > cdev1 and cdev2 muxes are utilized. Additionally, constify the cdev parent > > name lists to resolve checkpatch warnings. > > > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> > > This patch looks like it can be applied independently from the rest, > can I get a review from Thierry or someone else at nVidia so I > can just apply it? > > Yours, > Linus Walleij Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
On Wed, Oct 8, 2025 at 9:31 AM Svyatoslav Ryhel <clamor95@gmail.com> wrote: > Add csus_mux for further use as the csus clock parent, similar to how the > cdev1 and cdev2 muxes are utilized. Additionally, constify the cdev parent > name lists to resolve checkpatch warnings. > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> This patch 1/24 applied to the pinctrl tree! Yours, Linus Walleij
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c index 737fc2000f66..1a1758fd7def 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra20.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c @@ -2222,14 +2222,18 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = { .drvtype_in_mux = false, }; -static const char *cdev1_parents[] = { +static const char * const cdev1_parents[] = { "dev1_osc_div", "pll_a_out0", "pll_m_out1", "audio", }; -static const char *cdev2_parents[] = { +static const char * const cdev2_parents[] = { "dev2_osc_div", "hclk", "pclk", "pll_p_out4", }; +static const char * const csus_parents[] = { + "pll_c_out1", "pll_p_out2", "pll_p_out3", "vi_sensor", +}; + static void tegra20_pinctrl_register_clock_muxes(struct platform_device *pdev) { struct tegra_pmx *pmx = platform_get_drvdata(pdev); @@ -2239,6 +2243,9 @@ static void tegra20_pinctrl_register_clock_muxes(struct platform_device *pdev) clk_register_mux(NULL, "cdev2_mux", cdev2_parents, 4, 0, pmx->regs[1] + 0x8, 4, 2, CLK_MUX_READ_ONLY, NULL); + + clk_register_mux(NULL, "csus_mux", csus_parents, 4, 0, + pmx->regs[1] + 0x8, 6, 2, CLK_MUX_READ_ONLY, NULL); } static int tegra20_pinctrl_probe(struct platform_device *pdev)
Add csus_mux for further use as the csus clock parent, similar to how the cdev1 and cdev2 muxes are utilized. Additionally, constify the cdev parent name lists to resolve checkpatch warnings. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- drivers/pinctrl/tegra/pinctrl-tegra20.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)