diff mbox series

[v2,4/4] arm64: tegra: Limit max cpu frequency on P3450

Message ID 20250903-tegra210-speedo-v2-4-89e6f86b8942@gmail.com
State Superseded
Headers show
Series Properly Limit Tegra210 Clock Rates | expand

Commit Message

Aaron Kling via B4 Relay Sept. 3, 2025, 7:30 p.m. UTC 
From: Aaron Kling <webgeek1234@gmail.com>

P3450's cpu is rated for 1.5 GHz, but due to the passive cooling on the
devkit, the maximum frequency needs limited to 1.4 GHz to maintain
reasonable thermals. Ideally, the dfll driver would adjust based on
temperature reporting, but in the absence of that, this will have to do.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index ec0e84cb83ef9bf8f0e52e2958db33666813917c..10f878d3f50815d1f0297d15669048ab9cad73ee 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -594,6 +594,7 @@  clock@70110000 {
 		nvidia,droop-ctrl = <0x00000f00>;
 		nvidia,force-mode = <1>;
 		nvidia,sample-rate = <25000>;
+		nvidia,dfll-max-freq = <1479000000>;
 
 		nvidia,pwm-min-microvolts = <708000>;
 		nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */