| Message ID | 20250804041657.27688-1-pshete@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/2] dt-bindings: gpio: Add Tegra256 support | expand |
On 04/08/2025 06:16, Prathamesh Shete wrote: > then: > properties: > interrupts: > diff --git a/include/dt-bindings/gpio/tegra256-gpio.h b/include/dt-bindings/gpio/tegra256-gpio.h > new file mode 100644 > index 000000000000..36485b4bf47d > --- /dev/null > +++ b/include/dt-bindings/gpio/tegra256-gpio.h > @@ -0,0 +1,28 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */ > + > +/* > + ** This header provides constants for binding nvidia,tegra256-gpio*. Use Linux style comments. See Coding style. > + ** > + ** The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below > + ** provide names for this. > + ** > + ** The second cell contains standard flag values specified in gpio.h. > + **/ > + > +#ifndef _DT_BINDINGS_GPIO_TEGRA256_GPIO_H > +#define _DT_BINDINGS_GPIO_TEGRA256_GPIO_H > + > +#include <dt-bindings/gpio/gpio.h> > + > +/* GPIOs implemented by main GPIO controller */ > +#define TEGRA256_MAIN_GPIO_PORT_A 0 > +#define TEGRA256_MAIN_GPIO_PORT_B 1 > +#define TEGRA256_MAIN_GPIO_PORT_C 2 > +#define TEGRA256_MAIN_GPIO_PORT_D 3 > + > +#define TEGRA256_MAIN_GPIO(port, offset) \ > + ((TEGRA256_MAIN_GPIO_PORT_##port * 8) + (offset)) I don't see this macro being used in the drivers. I guess you need it for embedding hardware constant (so not really bindings)? You have entire commit msg to explain that... Best regards, Krzysztof
On Mon, Aug 04, 2025 at 09:46:56AM +0530, Prathamesh Shete wrote: > diff --git a/include/dt-bindings/gpio/tegra256-gpio.h b/include/dt-bindings/gpio/tegra256-gpio.h > new file mode 100644 > index 000000000000..36485b4bf47d > --- /dev/null > +++ b/include/dt-bindings/gpio/tegra256-gpio.h > @@ -0,0 +1,28 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml index 065f5761a93f..2bd620a1099b 100644 --- a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml @@ -85,6 +85,7 @@ properties: - nvidia,tegra194-gpio-aon - nvidia,tegra234-gpio - nvidia,tegra234-gpio-aon + - nvidia,tegra256-gpio reg-names: items: @@ -155,6 +156,7 @@ allOf: - nvidia,tegra186-gpio - nvidia,tegra194-gpio - nvidia,tegra234-gpio + - nvidia,tegra256-gpio then: properties: interrupts: diff --git a/include/dt-bindings/gpio/tegra256-gpio.h b/include/dt-bindings/gpio/tegra256-gpio.h new file mode 100644 index 000000000000..36485b4bf47d --- /dev/null +++ b/include/dt-bindings/gpio/tegra256-gpio.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */ + +/* + ** This header provides constants for binding nvidia,tegra256-gpio*. + ** + ** The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below + ** provide names for this. + ** + ** The second cell contains standard flag values specified in gpio.h. + **/ + +#ifndef _DT_BINDINGS_GPIO_TEGRA256_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA256_GPIO_H + +#include <dt-bindings/gpio/gpio.h> + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA256_MAIN_GPIO_PORT_A 0 +#define TEGRA256_MAIN_GPIO_PORT_B 1 +#define TEGRA256_MAIN_GPIO_PORT_C 2 +#define TEGRA256_MAIN_GPIO_PORT_D 3 + +#define TEGRA256_MAIN_GPIO(port, offset) \ + ((TEGRA256_MAIN_GPIO_PORT_##port * 8) + (offset)) + +#endif +
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra256. The number of pins is slightly different, but the programming model remains the same Signed-off-by: Prathamesh Shete <pshete@nvidia.com> --- .../bindings/gpio/nvidia,tegra186-gpio.yaml | 2 ++ include/dt-bindings/gpio/tegra256-gpio.h | 28 +++++++++++++++++++ 2 files changed, 30 insertions(+) create mode 100644 include/dt-bindings/gpio/tegra256-gpio.h