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bh=EOWi5Kvsv8Ir9mYtzX4oMt7r57mv1EqWeeYXt47rh9o=; b=umu0a7IagTxg5OQob7knYh1Pqo8RnpkBnpAv0q4Dom5ILb3VJqbyp7+2da3S686jrMfbqN zjT1lrvS+aiN0Qr6czatrU9LvpU7xNc0BGH/boMpQIPl6tzILbUzXHrCjX142CYD3lnwHM NV67Ctb8amEJdJ+Dvbub82HYdSQappk= Received: from diogo-gram.home (unknown [IPv6:2a01:14:8070:dc60:f4e6:62fe:d7f8:e109]) (Authenticated sender: ist187313) by mail1.tecnico.ulisboa.pt (Postfix) with ESMTPSA id CAC24360030; Tue, 9 Apr 2024 10:46:47 +0100 (WEST) From: Diogo Ivo To: krzysztof.kozlowski@linaro.org, thierry.reding@gmail.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org Cc: Diogo Ivo Subject: [PATCH 1/7] memory: tegra: Remove periodic compensation duplicate calls Date: Tue, 9 Apr 2024 10:46:24 +0100 Message-ID: <20240409094632.62916-2-diogo.ivo@tecnico.ulisboa.pt> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240409094632.62916-1-diogo.ivo@tecnico.ulisboa.pt> References: <20240409094632.62916-1-diogo.ivo@tecnico.ulisboa.pt> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Prior to calling periodic_compensation_handler() the code is doing one extra DRAM delay reading which is unnecessary as this is already done in periodic_compensation_handler(), so remove these extra calls. Signed-off-by: Diogo Ivo --- drivers/memory/tegra/tegra210-emc-cc-r21021.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/drivers/memory/tegra/tegra210-emc-cc-r21021.c b/drivers/memory/tegra/tegra210-emc-cc-r21021.c index 4cb608c71ead..9ec49ced8f91 100644 --- a/drivers/memory/tegra/tegra210-emc-cc-r21021.c +++ b/drivers/memory/tegra/tegra210-emc-cc-r21021.c @@ -492,7 +492,6 @@ static u32 tegra210_emc_r21021_periodic_compensation(struct tegra210_emc *emc) }; struct tegra210_emc_timing *last = emc->last; unsigned int items = ARRAY_SIZE(list), i; - unsigned long delay; if (last->periodic_training) { emc_dbg(emc, PER_TRAIN, "Periodic training starting\n"); @@ -530,18 +529,9 @@ static u32 tegra210_emc_r21021_periodic_compensation(struct tegra210_emc *emc) /* * 2. osc kick off - this assumes training and dvfs have set * correct MR23. - */ - tegra210_emc_start_periodic_compensation(emc); - - /* + * * 3. Let dram capture its clock tree delays. - */ - delay = tegra210_emc_actual_osc_clocks(last->run_clocks); - delay *= 1000; - delay /= last->rate + 1; - udelay(delay); - - /* + * * 4. Check delta wrt previous values (save value if margin * exceeds what is set in table). */ @@ -734,11 +724,6 @@ static void tegra210_emc_r21021_set_clock(struct tegra210_emc *emc, u32 clksrc) EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK, 0); - tegra210_emc_start_periodic_compensation(emc); - - delay = 1000 * tegra210_emc_actual_osc_clocks(last->run_clocks); - udelay((delay / last->rate) + 2); - value = periodic_compensation_handler(emc, DVFS_SEQUENCE, fake, next); value = (value * 128 * next->rate / 1000) / 1000000;