| Message ID | 20230221135726.40720-1-akhilrajeev@nvidia.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | i2c: tegra: Share same DMA channel for Rx and Tx | expand |
Hi Akhil,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on tegra/for-next]
[also build test ERROR on linus/master v6.2 next-20230221]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Akhil-R/i2c-tegra-Share-same-DMA-channel-for-Rx-and-Tx/20230221-215924
base: https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
patch link: https://lore.kernel.org/r/20230221135726.40720-1-akhilrajeev%40nvidia.com
patch subject: [PATCH] i2c: tegra: Share same DMA channel for Rx and Tx
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20230222/202302220130.flKenlan-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/643ca30fdac50b54b2ee65f97e6e2eda9974dd3c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Akhil-R/i2c-tegra-Share-same-DMA-channel-for-Rx-and-Tx/20230221-215924
git checkout 643ca30fdac50b54b2ee65f97e6e2eda9974dd3c
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash drivers/i2c/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202302220130.flKenlan-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from arch/m68k/include/asm/bug.h:32,
from include/linux/bug.h:5,
from include/linux/thread_info.h:13,
from include/asm-generic/preempt.h:5,
from ./arch/m68k/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:78,
from arch/m68k/include/asm/irqflags.h:6,
from include/linux/irqflags.h:16,
from arch/m68k/include/asm/atomic.h:6,
from include/linux/atomic.h:7,
from include/linux/cpumask.h:13,
from include/linux/smp.h:13,
from include/linux/lockdep.h:14,
from include/linux/mutex.h:17,
from include/linux/kernfs.h:11,
from include/linux/sysfs.h:16,
from include/linux/kobject.h:20,
from include/linux/of.h:17,
from include/linux/irqdomain.h:36,
from include/linux/acpi.h:13,
from drivers/i2c/busses/i2c-tegra.c:9:
drivers/i2c/busses/i2c-tegra.c: In function 'tegra_i2c_init_dma':
>> drivers/i2c/busses/i2c-tegra.c:465:26: error: 'struct tegra_i2c_dev' has no member named 'tx_dma_chan'; did you mean 'dma_chan'?
465 | WARN_ON(i2c_dev->tx_dma_chan->device != i2c_dev->rx_dma_chan->device);
| ^~~~~~~~~~~
include/asm-generic/bug.h:122:32: note: in definition of macro 'WARN_ON'
122 | int __ret_warn_on = !!(condition); \
| ^~~~~~~~~
>> drivers/i2c/busses/i2c-tegra.c:465:58: error: 'struct tegra_i2c_dev' has no member named 'rx_dma_chan'; did you mean 'dma_chan'?
465 | WARN_ON(i2c_dev->tx_dma_chan->device != i2c_dev->rx_dma_chan->device);
| ^~~~~~~~~~~
include/asm-generic/bug.h:122:32: note: in definition of macro 'WARN_ON'
122 | int __ret_warn_on = !!(condition); \
| ^~~~~~~~~
vim +465 drivers/i2c/busses/i2c-tegra.c
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 432
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 433 static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev)
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 434 {
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 435 struct dma_chan *chan;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 436 dma_addr_t dma_phys;
89e3748acd0bf6 Dmitry Osipenko 2020-09-30 437 u32 *dma_buf;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 438 int err;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 439
48cb6356fae125 Akhil R 2022-09-06 440 if (i2c_dev->is_vi)
89328b1b81858f Jonathan Hunter 2019-02-21 441 return 0;
89328b1b81858f Jonathan Hunter 2019-02-21 442
48cb6356fae125 Akhil R 2022-09-06 443 if (!i2c_dev->hw->has_apb_dma) {
89328b1b81858f Jonathan Hunter 2019-02-21 444 if (!IS_ENABLED(CONFIG_TEGRA20_APB_DMA)) {
48cb6356fae125 Akhil R 2022-09-06 445 dev_dbg(i2c_dev->dev, "APB DMA support not enabled\n");
48cb6356fae125 Akhil R 2022-09-06 446 return 0;
48cb6356fae125 Akhil R 2022-09-06 447 }
48cb6356fae125 Akhil R 2022-09-06 448 } else if (!IS_ENABLED(CONFIG_TEGRA186_GPC_DMA)) {
48cb6356fae125 Akhil R 2022-09-06 449 dev_dbg(i2c_dev->dev, "GPC DMA support not enabled\n");
89328b1b81858f Jonathan Hunter 2019-02-21 450 return 0;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 451 }
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 452
643ca30fdac50b Akhil R 2023-02-21 453 /* The same channel will be used for both Rx and Tx.
643ca30fdac50b Akhil R 2023-02-21 454 * Keeping the name as tx for backward compatibility with
643ca30fdac50b Akhil R 2023-02-21 455 * existing devicetrees.
643ca30fdac50b Akhil R 2023-02-21 456 */
79e4be2c08bbbf Peter Ujfalusi 2019-11-13 457 chan = dma_request_chan(i2c_dev->dev, "tx");
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 458 if (IS_ERR(chan)) {
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 459 err = PTR_ERR(chan);
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 460 goto err_out;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 461 }
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 462
643ca30fdac50b Akhil R 2023-02-21 463 i2c_dev->dma_chan = chan;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 464
cdbf26251d3b35 Thierry Reding 2022-10-20 @465 WARN_ON(i2c_dev->tx_dma_chan->device != i2c_dev->rx_dma_chan->device);
cdbf26251d3b35 Thierry Reding 2022-10-20 466 i2c_dev->dma_dev = chan->device->dev;
cdbf26251d3b35 Thierry Reding 2022-10-20 467
55c52f16a017ca Dmitry Osipenko 2020-09-30 468 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len +
55c52f16a017ca Dmitry Osipenko 2020-09-30 469 I2C_PACKET_HEADER_SIZE;
55c52f16a017ca Dmitry Osipenko 2020-09-30 470
cdbf26251d3b35 Thierry Reding 2022-10-20 471 dma_buf = dma_alloc_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size,
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 472 &dma_phys, GFP_KERNEL | __GFP_NOWARN);
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 473 if (!dma_buf) {
76d06443cc5b37 Dmitry Osipenko 2020-09-30 474 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n");
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 475 err = -ENOMEM;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 476 goto err_out;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 477 }
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 478
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 479 i2c_dev->dma_buf = dma_buf;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 480 i2c_dev->dma_phys = dma_phys;
c886a4a03a0155 Dmitry Osipenko 2020-09-30 481
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 482 return 0;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 483
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 484 err_out:
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 485 tegra_i2c_release_dma(i2c_dev);
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 486 if (err != -EPROBE_DEFER) {
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 487 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err);
bb0e9b1d2a1f93 Colin Ian King 2019-02-15 488 dev_err(i2c_dev->dev, "falling back to PIO\n");
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 489 return 0;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 490 }
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 491
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 492 return err;
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 493 }
86c92b9965ff17 Sowjanya Komatineni 2019-02-12 494
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 6aab84c8d22b..c0a7057d4f0a 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -248,8 +248,7 @@ struct tegra_i2c_hw_feature { * @msg_read: indicates that the transfer is a read access * @timings: i2c timings information like bus frequency * @multimaster_mode: indicates that I2C controller is in multi-master mode - * @tx_dma_chan: DMA transmit channel - * @rx_dma_chan: DMA receive channel + * @dma_chan: DMA channel * @dma_phys: handle to DMA resources * @dma_buf: pointer to allocated DMA buffer * @dma_buf_size: DMA buffer size @@ -281,8 +280,7 @@ struct tegra_i2c_dev { u8 *msg_buf; struct completion dma_complete; - struct dma_chan *tx_dma_chan; - struct dma_chan *rx_dma_chan; + struct dma_chan *dma_chan; unsigned int dma_buf_size; struct device *dma_dev; dma_addr_t dma_phys; @@ -398,7 +396,7 @@ static int tegra_i2c_dma_submit(struct tegra_i2c_dev *i2c_dev, size_t len) reinit_completion(&i2c_dev->dma_complete); dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; - chan = i2c_dev->msg_read ? i2c_dev->rx_dma_chan : i2c_dev->tx_dma_chan; + chan = i2c_dev->dma_chan; dma_desc = dmaengine_prep_slave_single(chan, i2c_dev->dma_phys, len, dir, DMA_PREP_INTERRUPT | @@ -426,14 +424,9 @@ static void tegra_i2c_release_dma(struct tegra_i2c_dev *i2c_dev) i2c_dev->dma_buf = NULL; } - if (i2c_dev->tx_dma_chan) { - dma_release_channel(i2c_dev->tx_dma_chan); - i2c_dev->tx_dma_chan = NULL; - } - - if (i2c_dev->rx_dma_chan) { - dma_release_channel(i2c_dev->rx_dma_chan); - i2c_dev->rx_dma_chan = NULL; + if (i2c_dev->dma_chan) { + dma_release_channel(i2c_dev->dma_chan); + i2c_dev->dma_chan = NULL; } } @@ -457,21 +450,17 @@ static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) return 0; } - chan = dma_request_chan(i2c_dev->dev, "rx"); - if (IS_ERR(chan)) { - err = PTR_ERR(chan); - goto err_out; - } - - i2c_dev->rx_dma_chan = chan; - + /* The same channel will be used for both Rx and Tx. + * Keeping the name as tx for backward compatibility with + * existing devicetrees. + */ chan = dma_request_chan(i2c_dev->dev, "tx"); if (IS_ERR(chan)) { err = PTR_ERR(chan); goto err_out; } - i2c_dev->tx_dma_chan = chan; + i2c_dev->dma_chan = chan; WARN_ON(i2c_dev->tx_dma_chan->device != i2c_dev->rx_dma_chan->device); i2c_dev->dma_dev = chan->device->dev; @@ -974,11 +963,7 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); if (i2c_dev->dma_mode) { - if (i2c_dev->msg_read) - dmaengine_terminate_async(i2c_dev->rx_dma_chan); - else - dmaengine_terminate_async(i2c_dev->tx_dma_chan); - + dmaengine_terminate_async(i2c_dev->dma_chan); complete(&i2c_dev->dma_complete); } @@ -1008,8 +993,8 @@ static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, else dma_burst = 8; + chan = i2c_dev->dma_chan; if (i2c_dev->msg_read) { - chan = i2c_dev->rx_dma_chan; reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO); slv_config.src_addr = i2c_dev->base_phys + reg_offset; @@ -1021,7 +1006,6 @@ static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, else val = I2C_FIFO_CONTROL_RX_TRIG(dma_burst); } else { - chan = i2c_dev->tx_dma_chan; reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO); slv_config.dst_addr = i2c_dev->base_phys + reg_offset; @@ -1333,13 +1317,8 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, * performs synchronization after the transfer's termination * and we want to get a completion if transfer succeeded. */ - dmaengine_synchronize(i2c_dev->msg_read ? - i2c_dev->rx_dma_chan : - i2c_dev->tx_dma_chan); - - dmaengine_terminate_sync(i2c_dev->msg_read ? - i2c_dev->rx_dma_chan : - i2c_dev->tx_dma_chan); + dmaengine_synchronize(i2c_dev->dma_chan); + dmaengine_terminate_sync(i2c_dev->dma_chan); if (!time_left && !completion_done(&i2c_dev->dma_complete)) { dev_err(i2c_dev->dev, "DMA transfer timed out\n");
Allocate only one DMA channel for I2C and share it for both Tx and Rx. Since I2C supports only half duplex, there is no impact on perf with this. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> --- drivers/i2c/busses/i2c-tegra.c | 51 ++++++++++------------------------ 1 file changed, 15 insertions(+), 36 deletions(-)