| Message ID | 20221117184039.2291937-9-thierry.reding@gmail.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | drm/simpledrm: Support system memory framebuffers | expand |
Hi Am 17.11.22 um 19:40 schrieb Thierry Reding: > From: Thierry Reding <treding@nvidia.com> > > Add the framebuffer carveout reserved memory node as well as a simple- > framebuffer node that is used to bind to the framebuffer that the > bootloader has set up. I don't know about the current status of this patchset, but feel free to send whatever update you have. Best regards Thomas > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > Changes in v2: > - clear out dynamic fields and leave it up to firmware to fill them in > - mark simple-framebuffer node as disabled by default > > .../nvidia/tegra194-p3509-0000+p3668-0001.dts | 43 +++++++++++++++++++ > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +- > 2 files changed, 44 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts > index 238fd98e8e45..85b4aaa2ad4e 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts > +++ b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts > @@ -7,4 +7,47 @@ > / { > model = "NVIDIA Jetson Xavier NX Developer Kit (eMMC)"; > compatible = "nvidia,p3509-0000+p3668-0001", "nvidia,tegra194"; > + > + chosen { > + framebuffer { > + compatible = "simple-framebuffer"; > + status = "disabled"; > + memory-region = <&fb>; > + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>; > + clocks = <&bpmp TEGRA194_CLK_SOR1_REF>, > + <&bpmp TEGRA194_CLK_SOR1_OUT>, > + <&bpmp TEGRA194_CLK_SOR1_PAD_CLKOUT>, > + <&bpmp TEGRA194_CLK_PLLD2>, > + <&bpmp TEGRA194_CLK_PLLDP>, > + <&bpmp TEGRA194_CLK_NVDISPLAY_DISP>, > + <&bpmp TEGRA194_CLK_NVDISPLAYHUB>, > + <&bpmp TEGRA194_CLK_NVDISPLAY_P0>; > + width = <0>; > + height = <0>; > + stride = <0>; > + format = "x8b8g8r8"; > + }; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + fb: framebuffer@0,0 { > + compatible = "framebuffer"; > + reg = <0x0 0x0 0x0 0x0>; > + iommu-addresses = <&dc0 0x0 0x0 0x0 0x0>; > + }; > + }; > + > + bus@0 { > + host1x@13e00000 { > + display-hub@15200000 { > + display@15200000 { > + memory-region = <&fb>; > + }; > + }; > + }; > + }; > }; > diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > index d0dbfafbc930..ec318b9e700c 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > @@ -1972,7 +1972,7 @@ display-hub@15200000 { > > ranges = <0x15200000 0x15200000 0x40000>; > > - display@15200000 { > + dc0: display@15200000 { > compatible = "nvidia,tegra194-dc"; > reg = <0x15200000 0x10000>; > interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
On Tue, Jan 17, 2023 at 03:55:21PM +0100, Thomas Zimmermann wrote: > Hi > > Am 17.11.22 um 19:40 schrieb Thierry Reding: > > From: Thierry Reding <treding@nvidia.com> > > > > Add the framebuffer carveout reserved memory node as well as a simple- > > framebuffer node that is used to bind to the framebuffer that the > > bootloader has set up. > > I don't know about the current status of this patchset, but feel free to > send whatever update you have. Sorry, got side-tracked a few times during the last few weeks. I've had to rework some parts of this for the recent changes to the format helpers, but nothing major. I'll send out the updated version shortly once I've tested all cases. Thierry
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts index 238fd98e8e45..85b4aaa2ad4e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts +++ b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dts @@ -7,4 +7,47 @@ / { model = "NVIDIA Jetson Xavier NX Developer Kit (eMMC)"; compatible = "nvidia,p3509-0000+p3668-0001", "nvidia,tegra194"; + + chosen { + framebuffer { + compatible = "simple-framebuffer"; + status = "disabled"; + memory-region = <&fb>; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>; + clocks = <&bpmp TEGRA194_CLK_SOR1_REF>, + <&bpmp TEGRA194_CLK_SOR1_OUT>, + <&bpmp TEGRA194_CLK_SOR1_PAD_CLKOUT>, + <&bpmp TEGRA194_CLK_PLLD2>, + <&bpmp TEGRA194_CLK_PLLDP>, + <&bpmp TEGRA194_CLK_NVDISPLAY_DISP>, + <&bpmp TEGRA194_CLK_NVDISPLAYHUB>, + <&bpmp TEGRA194_CLK_NVDISPLAY_P0>; + width = <0>; + height = <0>; + stride = <0>; + format = "x8b8g8r8"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + fb: framebuffer@0,0 { + compatible = "framebuffer"; + reg = <0x0 0x0 0x0 0x0>; + iommu-addresses = <&dc0 0x0 0x0 0x0 0x0>; + }; + }; + + bus@0 { + host1x@13e00000 { + display-hub@15200000 { + display@15200000 { + memory-region = <&fb>; + }; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index d0dbfafbc930..ec318b9e700c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1972,7 +1972,7 @@ display-hub@15200000 { ranges = <0x15200000 0x15200000 0x40000>; - display@15200000 { + dc0: display@15200000 { compatible = "nvidia,tegra194-dc"; reg = <0x15200000 0x10000>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;