diff mbox series

[v3] arm64: tegra: Add Tegra234 SDMMC1 device tree node

Message ID 20221007165941.16539-1-pshete@nvidia.com
State Accepted
Headers show
Series [v3] arm64: tegra: Add Tegra234 SDMMC1 device tree node | expand

Commit Message

Prathamesh Shete Oct. 7, 2022, 4:59 p.m. UTC
Add device tree node for Tegra234 SDMMC1 instance.
Add and enable SD card instance in device tree.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
---
 .../boot/dts/nvidia/tegra234-p3701-0000.dtsi  |  7 +++
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 60 +++++++++++++++++++
 2 files changed, 67 insertions(+)

Comments

Thierry Reding Oct. 24, 2022, 1:52 p.m. UTC | #1
On Fri, Oct 07, 2022 at 10:29:41PM +0530, Prathamesh Shete wrote:
> Add device tree node for Tegra234 SDMMC1 instance.
> Add and enable SD card instance in device tree.
> 
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
> ---
>  .../boot/dts/nvidia/tegra234-p3701-0000.dtsi  |  7 +++
>  arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 60 +++++++++++++++++++
>  2 files changed, 67 insertions(+)

Applied, with some minor changes (see below).

> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
[...]
> +		mmc@3400000 {
> +			compatible = "nvidia,tegra194-sdhci", "nvidia,tegra234-sdhci";
> +			reg = <0x03400000 0x20000>;
> +			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
> +				 <&bpmp TEGRA234_CLK_SDMMC_LEGACY_TM>;
> +			clock-names = "sdhci", "tmclk";
> +			assigned-clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
> +					<&bpmp TEGRA234_CLK_PLLC4_MUXED>;

I've aligned these.

> +			assigned-clock-parents =
> +					  <&bpmp TEGRA234_CLK_PLLC4_MUXED>,

And put this on the previous line. checkpatch's character/row limit is
100, so let's use that.

> +					  <&bpmp TEGRA234_CLK_PLLC4_VCO_DIV2>;

> +			resets = <&bpmp TEGRA234_RESET_SDMMC1>;
> +			reset-names = "sdhci";
> +			interconnects = <&mc TEGRA234_MEMORY_CLIENT_SDMMCRA &emc>,
> +					<&mc TEGRA234_MEMORY_CLIENT_SDMMCWA &emc>;
> +			interconnect-names = "dma-mem", "write";
> +			iommus = <&smmu_niso1 TEGRA234_SID_SDMMC1A>;
> +			pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +			pinctrl-0 = <&sdmmc1_3v3>;
> +			pinctrl-1 = <&sdmmc1_1v8>;
> +			nvidia,pad-autocal-pull-up-offset-3v3-timeout =
> +								      <0x07>;
> +			nvidia,pad-autocal-pull-down-offset-3v3-timeout =
> +									<0x07>;
> +			nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
> +			nvidia,pad-autocal-pull-down-offset-1v8-timeout =
> +									<0x07>;

Same here.

Thanks,
Thierry
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
index 9e4d72cfa69f..fe52810e5b9d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
@@ -55,6 +55,13 @@ 
 			};
 		};
 
+		mmc@3400000 {
+			status = "okay";
+			bus-width = <4>;
+			cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
+			disable-wp;
+		};
+
 		mmc@3460000 {
 			status = "okay";
 			bus-width = <8>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 0170bfa8a467..58f6165100a8 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -7,6 +7,7 @@ 
 #include <dt-bindings/memory/tegra234-mc.h>
 #include <dt-bindings/power/tegra234-powergate.h>
 #include <dt-bindings/reset/tegra234-reset.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
 
 / {
 	compatible = "nvidia,tegra234";
@@ -895,6 +896,45 @@ 
 			status = "disabled";
 		};
 
+		mmc@3400000 {
+			compatible = "nvidia,tegra194-sdhci", "nvidia,tegra234-sdhci";
+			reg = <0x03400000 0x20000>;
+			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
+				 <&bpmp TEGRA234_CLK_SDMMC_LEGACY_TM>;
+			clock-names = "sdhci", "tmclk";
+			assigned-clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
+					<&bpmp TEGRA234_CLK_PLLC4_MUXED>;
+			assigned-clock-parents =
+					  <&bpmp TEGRA234_CLK_PLLC4_MUXED>,
+					  <&bpmp TEGRA234_CLK_PLLC4_VCO_DIV2>;
+			resets = <&bpmp TEGRA234_RESET_SDMMC1>;
+			reset-names = "sdhci";
+			interconnects = <&mc TEGRA234_MEMORY_CLIENT_SDMMCRA &emc>,
+					<&mc TEGRA234_MEMORY_CLIENT_SDMMCWA &emc>;
+			interconnect-names = "dma-mem", "write";
+			iommus = <&smmu_niso1 TEGRA234_SID_SDMMC1A>;
+			pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+			pinctrl-0 = <&sdmmc1_3v3>;
+			pinctrl-1 = <&sdmmc1_1v8>;
+			nvidia,pad-autocal-pull-up-offset-3v3-timeout =
+								      <0x07>;
+			nvidia,pad-autocal-pull-down-offset-3v3-timeout =
+									<0x07>;
+			nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
+			nvidia,pad-autocal-pull-down-offset-1v8-timeout =
+									<0x07>;
+			nvidia,pad-autocal-pull-up-offset-sdr104 = <0x00>;
+			nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
+			nvidia,default-tap = <14>;
+			nvidia,default-trim = <0x8>;
+			sd-uhs-sdr25;
+			sd-uhs-sdr50;
+			sd-uhs-ddr50;
+			sd-uhs-sdr104;
+			status = "disabled";
+		};
+
 		mmc@3460000 {
 			compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
 			reg = <0x03460000 0x20000>;
@@ -1541,6 +1581,26 @@ 
 
 			#interrupt-cells = <2>;
 			interrupt-controller;
+
+			sdmmc1_3v3: sdmmc1-3v3 {
+				pins = "sdmmc1-hv";
+				power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+			};
+
+			sdmmc1_1v8: sdmmc1-1v8 {
+				pins = "sdmmc1-hv";
+				power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+			};
+
+			sdmmc3_3v3: sdmmc3-3v3 {
+				pins = "sdmmc3-hv";
+				power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+			};
+
+			sdmmc3_1v8: sdmmc3-1v8 {
+				pins = "sdmmc3-hv";
+				power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+			};
 		};
 
 		aon-fabric@c600000 {