| Message ID | 20220914095628.26093-4-pshete@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v2,1/4] mmc: sdhci-tegra: Separate T19x and T23x SoC data | expand |
On Wed, Sep 14, 2022 at 03:26:28PM +0530, Prathamesh Shete wrote: > Ensure tegra_host member "curr_clk_rate" holds the actual clock rate > instead of requested clock rate for proper use during tuning correction > algorithm. Ideally there shouldn't be a deviation between host_clk and the actual clock rate that was set. Perhaps it'd be good to provide a bit more information on what the deviation can be and when that happens, as well as what the consequences are. That would make it a bit more obvious why this fix is needed. Thierry > > Fixes: ea8fc5953e8b ("mmc: tegra: update hw tuning process") > > Signed-off-by: Aniruddha TVS Rao <anrao@nvidia.com> > Signed-off-by: Prathamesh Shete <pshete@nvidia.com> > --- > drivers/mmc/host/sdhci-tegra.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c > index 7d16dc41fe91..42b018d4ebc3 100644 > --- a/drivers/mmc/host/sdhci-tegra.c > +++ b/drivers/mmc/host/sdhci-tegra.c > @@ -778,7 +778,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) > dev_err(dev, "failed to set clk rate to %luHz: %d\n", > host_clk, err); > > - tegra_host->curr_clk_rate = host_clk; > + tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk); > if (tegra_host->ddr_signaling) > host->max_clk = host_clk; > else > -- > 2.17.1 >
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 7d16dc41fe91..42b018d4ebc3 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -778,7 +778,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) dev_err(dev, "failed to set clk rate to %luHz: %d\n", host_clk, err); - tegra_host->curr_clk_rate = host_clk; + tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk); if (tegra_host->ddr_signaling) host->max_clk = host_clk; else
Ensure tegra_host member "curr_clk_rate" holds the actual clock rate instead of requested clock rate for proper use during tuning correction algorithm. Fixes: ea8fc5953e8b ("mmc: tegra: update hw tuning process") Signed-off-by: Aniruddha TVS Rao <anrao@nvidia.com> Signed-off-by: Prathamesh Shete <pshete@nvidia.com> --- drivers/mmc/host/sdhci-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)