@@ -933,6 +933,20 @@
status = "okay";
};
+ sce-fabric@b600000 {
+ compatible = "nvidia,tegra234-sce-fabric";
+ reg = <0xb600000 0x40000>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
+
+ rce-fabric@be00000 {
+ compatible = "nvidia,tegra234-rce-fabric";
+ reg = <0xbe00000 0x40000>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
+
hsp_aon: hsp@c150000 {
compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
reg = <0x0c150000 0x90000>;
@@ -1017,6 +1031,27 @@
interrupt-controller;
};
+ aon-fabric@c600000 {
+ compatible = "nvidia,tegra234-aon-fabric";
+ reg = <0xc600000 0x40000>;
+ interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
+
+ bpmp-fabric@d600000 {
+ compatible = "nvidia,tegra234-bpmp-fabric";
+ reg = <0xd600000 0x40000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
+
+ dce-fabric@de00000 {
+ compatible = "nvidia,tegra234-sce-fabric";
+ reg = <0xde00000 0x40000>;
+ interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
+
gic: interrupt-controller@f400000 {
compatible = "arm,gic-v3";
reg = <0x0f400000 0x010000>, /* GICD */
@@ -1310,6 +1345,13 @@
nvidia,memory-controller = <&mc>;
status = "okay";
};
+
+ cbb-fabric@0x13a00000 {
+ compatible = "nvidia,tegra234-cbb-fabric";
+ reg = <0x13a00000 0x400000>;
+ interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
};
ccplex@e000000 {
Control Backbone(CBB) version 2.0 is used in Tegra234 SOC. Adding nodes to enable handling of errors from different CBB 2.0 based fabrics in Tegra234 SOC. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 42 ++++++++++++++++++++++++ 1 file changed, 42 insertions(+)