Message ID | 20210527074614.49149-7-omp@nvidia.com |
---|---|
State | Superseded |
Headers | show
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Thu, 27 May 2021 07:46:55 +0000 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 27 May 2021 07:46:53 +0000 Received: from buildserver-hdc-comms.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 27 May 2021 00:46:50 -0700 From: Om Prakash Singh <omp@nvidia.com> To: <vidyas@nvidia.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com> CC: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <kthota@nvidia.com>, <mmaddireddy@nvidia.com>, Om Prakash Singh <omp@nvidia.com> Subject: [PATCH V1 4/5] PCI: tegra: Don't allow suspend when Tegra PCIe is in EP mode Date: Thu, 27 May 2021 13:16:13 +0530 Message-ID: <20210527074614.49149-7-omp@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210527074614.49149-1-omp@nvidia.com> References: <20210527074614.49149-1-omp@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 030a70d5-db68-44d2-1eeb-08d920e3994e X-MS-TrafficTypeDiagnostic: MN2PR12MB3504: X-Microsoft-Antispam-PRVS: <MN2PR12MB3504E4AD4626C9136BFC7653DA239@MN2PR12MB3504.namprd12.prod.outlook.com> X-MS-Oob-TLC-OOBClassifiers: OLM:4502; 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Series |
Update pcie-tegra194 driver
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expand
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diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index ae62fdc840e6..93c89f2084a7 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -2276,6 +2276,11 @@ static int tegra_pcie_dw_suspend_late(struct device *dev) struct tegra_pcie_dw *pcie = dev_get_drvdata(dev); u32 val; + if (pcie->mode == DW_PCIE_EP_TYPE) { + dev_err(dev, "Tegra PCIe is in EP mode, suspend not allowed"); + return -EPERM; + } + if (!pcie->link_state) return 0;
When Tegra PCIe is in endpoint mode it should be available for root port. PCIe link up by root port fails if it is in suspend state. So, don't allow Tegra to suspend when endpoint mode is enabled. Signed-off-by: Om Prakash Singh <omp@nvidia.com> --- drivers/pci/controller/dwc/pcie-tegra194.c | 5 +++++ 1 file changed, 5 insertions(+)