| Message ID | 20190610164400.11830-4-digetx@gmail.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Few more cleanups for tegra-timer | expand |
On 10/06/2019 17:43, Dmitry Osipenko wrote: > The of_clk structure has a period field that is set up initially by > timer_of_clk_init(), that period value need to be adjusted for a case of > TIMER1-9 that are running at a fixed rate that doesn't match the clock's > rate. Note that the period value is currently used only by some of the > clocksource drivers internally and hence this is just a minor cleanup > change that doesn't fix anything. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > drivers/clocksource/timer-tegra.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c > index 810b4e7435cf..646b3530c2d2 100644 > --- a/drivers/clocksource/timer-tegra.c > +++ b/drivers/clocksource/timer-tegra.c > @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) > static int tegra_timer_set_periodic(struct clock_event_device *evt) > { > void __iomem *reg_base = timer_of_base(to_timer_of(evt)); > + unsigned long period = timer_of_period(to_timer_of(evt)); > > - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | > - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), > + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), > reg_base + TIMER_PTV); > > return 0; > @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, > cpu_to->clkevt.rating = rating; > cpu_to->clkevt.cpumask = cpumask_of(cpu); > cpu_to->of_base.base = timer_reg_base + base; > + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); Any reason you made this a round-up? Jon
14.06.2019 18:48, Jon Hunter пишет: > > On 10/06/2019 17:43, Dmitry Osipenko wrote: >> The of_clk structure has a period field that is set up initially by >> timer_of_clk_init(), that period value need to be adjusted for a case of >> TIMER1-9 that are running at a fixed rate that doesn't match the clock's >> rate. Note that the period value is currently used only by some of the >> clocksource drivers internally and hence this is just a minor cleanup >> change that doesn't fix anything. >> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >> --- >> drivers/clocksource/timer-tegra.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c >> index 810b4e7435cf..646b3530c2d2 100644 >> --- a/drivers/clocksource/timer-tegra.c >> +++ b/drivers/clocksource/timer-tegra.c >> @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) >> static int tegra_timer_set_periodic(struct clock_event_device *evt) >> { >> void __iomem *reg_base = timer_of_base(to_timer_of(evt)); >> + unsigned long period = timer_of_period(to_timer_of(evt)); >> >> - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | >> - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), >> + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), >> reg_base + TIMER_PTV); >> >> return 0; >> @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, >> cpu_to->clkevt.rating = rating; >> cpu_to->clkevt.cpumask = cpumask_of(cpu); >> cpu_to->of_base.base = timer_reg_base + base; >> + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); > > Any reason you made this a round-up? That's what timer_of_clk_init() does, I assume it should be a more correct variant.
On 14/06/2019 17:45, Dmitry Osipenko wrote: > 14.06.2019 18:48, Jon Hunter пишет: >> >> On 10/06/2019 17:43, Dmitry Osipenko wrote: >>> The of_clk structure has a period field that is set up initially by >>> timer_of_clk_init(), that period value need to be adjusted for a case of >>> TIMER1-9 that are running at a fixed rate that doesn't match the clock's >>> rate. Note that the period value is currently used only by some of the >>> clocksource drivers internally and hence this is just a minor cleanup >>> change that doesn't fix anything. >>> >>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >>> --- >>> drivers/clocksource/timer-tegra.c | 5 +++-- >>> 1 file changed, 3 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c >>> index 810b4e7435cf..646b3530c2d2 100644 >>> --- a/drivers/clocksource/timer-tegra.c >>> +++ b/drivers/clocksource/timer-tegra.c >>> @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) >>> static int tegra_timer_set_periodic(struct clock_event_device *evt) >>> { >>> void __iomem *reg_base = timer_of_base(to_timer_of(evt)); >>> + unsigned long period = timer_of_period(to_timer_of(evt)); >>> >>> - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | >>> - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), >>> + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), >>> reg_base + TIMER_PTV); >>> >>> return 0; >>> @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, >>> cpu_to->clkevt.rating = rating; >>> cpu_to->clkevt.cpumask = cpumask_of(cpu); >>> cpu_to->of_base.base = timer_reg_base + base; >>> + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); >> >> Any reason you made this a round-up? > > That's what timer_of_clk_init() does, I assume it should be a more correct variant. Sounds to me like this should be 2 patches, because you are changing the value. This is not just purely cleanup IMO. Jon
17.06.2019 13:51, Jon Hunter пишет: > > On 14/06/2019 17:45, Dmitry Osipenko wrote: >> 14.06.2019 18:48, Jon Hunter пишет: >>> >>> On 10/06/2019 17:43, Dmitry Osipenko wrote: >>>> The of_clk structure has a period field that is set up initially by >>>> timer_of_clk_init(), that period value need to be adjusted for a case of >>>> TIMER1-9 that are running at a fixed rate that doesn't match the clock's >>>> rate. Note that the period value is currently used only by some of the >>>> clocksource drivers internally and hence this is just a minor cleanup >>>> change that doesn't fix anything. >>>> >>>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >>>> --- >>>> drivers/clocksource/timer-tegra.c | 5 +++-- >>>> 1 file changed, 3 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c >>>> index 810b4e7435cf..646b3530c2d2 100644 >>>> --- a/drivers/clocksource/timer-tegra.c >>>> +++ b/drivers/clocksource/timer-tegra.c >>>> @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) >>>> static int tegra_timer_set_periodic(struct clock_event_device *evt) >>>> { >>>> void __iomem *reg_base = timer_of_base(to_timer_of(evt)); >>>> + unsigned long period = timer_of_period(to_timer_of(evt)); >>>> >>>> - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | >>>> - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), >>>> + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), >>>> reg_base + TIMER_PTV); >>>> >>>> return 0; >>>> @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, >>>> cpu_to->clkevt.rating = rating; >>>> cpu_to->clkevt.cpumask = cpumask_of(cpu); >>>> cpu_to->of_base.base = timer_reg_base + base; >>>> + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); >>> >>> Any reason you made this a round-up? >> >> That's what timer_of_clk_init() does, I assume it should be a more correct variant. > > Sounds to me like this should be 2 patches, because you are changing the > value. This is not just purely cleanup IMO. Indeed, that could be at least mentioned in the commit message. Probably I just assumed that this is such a minor change that not worth anything. A hundred of microseconds is hardly noticeable. I'm not really sure if this really worth a re-spin at this point. Jon, are you insisting? Also, I now see that some drivers use DIV_ROUND_CLOSEST(), maybe it will be even better? Not sure.. given that this is still a microseconds difference.
On 17/06/2019 15:04, Dmitry Osipenko wrote: > 17.06.2019 13:51, Jon Hunter пишет: >> >> On 14/06/2019 17:45, Dmitry Osipenko wrote: >>> 14.06.2019 18:48, Jon Hunter пишет: >>>> >>>> On 10/06/2019 17:43, Dmitry Osipenko wrote: >>>>> The of_clk structure has a period field that is set up initially by >>>>> timer_of_clk_init(), that period value need to be adjusted for a case of >>>>> TIMER1-9 that are running at a fixed rate that doesn't match the clock's >>>>> rate. Note that the period value is currently used only by some of the >>>>> clocksource drivers internally and hence this is just a minor cleanup >>>>> change that doesn't fix anything. >>>>> >>>>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >>>>> --- >>>>> drivers/clocksource/timer-tegra.c | 5 +++-- >>>>> 1 file changed, 3 insertions(+), 2 deletions(-) >>>>> >>>>> diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c >>>>> index 810b4e7435cf..646b3530c2d2 100644 >>>>> --- a/drivers/clocksource/timer-tegra.c >>>>> +++ b/drivers/clocksource/timer-tegra.c >>>>> @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) >>>>> static int tegra_timer_set_periodic(struct clock_event_device *evt) >>>>> { >>>>> void __iomem *reg_base = timer_of_base(to_timer_of(evt)); >>>>> + unsigned long period = timer_of_period(to_timer_of(evt)); >>>>> >>>>> - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | >>>>> - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), >>>>> + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), >>>>> reg_base + TIMER_PTV); >>>>> >>>>> return 0; >>>>> @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, >>>>> cpu_to->clkevt.rating = rating; >>>>> cpu_to->clkevt.cpumask = cpumask_of(cpu); >>>>> cpu_to->of_base.base = timer_reg_base + base; >>>>> + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); >>>> >>>> Any reason you made this a round-up? >>> >>> That's what timer_of_clk_init() does, I assume it should be a more correct variant. >> >> Sounds to me like this should be 2 patches, because you are changing the >> value. This is not just purely cleanup IMO. > > Indeed, that could be at least mentioned in the commit message. Probably I just > assumed that this is such a minor change that not worth anything. A hundred of > microseconds is hardly noticeable. > > I'm not really sure if this really worth a re-spin at this point. Jon, are you insisting? At a minimum the changelog needs to be udpated to reflect what is going on here. Yes it may not be a massive difference, but I prefer not to change things without any rationale. Cheers Jon
18.06.2019 11:40, Jon Hunter пишет: > > On 17/06/2019 15:04, Dmitry Osipenko wrote: >> 17.06.2019 13:51, Jon Hunter пишет: >>> >>> On 14/06/2019 17:45, Dmitry Osipenko wrote: >>>> 14.06.2019 18:48, Jon Hunter пишет: >>>>> >>>>> On 10/06/2019 17:43, Dmitry Osipenko wrote: >>>>>> The of_clk structure has a period field that is set up initially by >>>>>> timer_of_clk_init(), that period value need to be adjusted for a case of >>>>>> TIMER1-9 that are running at a fixed rate that doesn't match the clock's >>>>>> rate. Note that the period value is currently used only by some of the >>>>>> clocksource drivers internally and hence this is just a minor cleanup >>>>>> change that doesn't fix anything. >>>>>> >>>>>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >>>>>> --- >>>>>> drivers/clocksource/timer-tegra.c | 5 +++-- >>>>>> 1 file changed, 3 insertions(+), 2 deletions(-) >>>>>> >>>>>> diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c >>>>>> index 810b4e7435cf..646b3530c2d2 100644 >>>>>> --- a/drivers/clocksource/timer-tegra.c >>>>>> +++ b/drivers/clocksource/timer-tegra.c >>>>>> @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) >>>>>> static int tegra_timer_set_periodic(struct clock_event_device *evt) >>>>>> { >>>>>> void __iomem *reg_base = timer_of_base(to_timer_of(evt)); >>>>>> + unsigned long period = timer_of_period(to_timer_of(evt)); >>>>>> >>>>>> - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | >>>>>> - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), >>>>>> + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), >>>>>> reg_base + TIMER_PTV); >>>>>> >>>>>> return 0; >>>>>> @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, >>>>>> cpu_to->clkevt.rating = rating; >>>>>> cpu_to->clkevt.cpumask = cpumask_of(cpu); >>>>>> cpu_to->of_base.base = timer_reg_base + base; >>>>>> + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); >>>>> >>>>> Any reason you made this a round-up? >>>> >>>> That's what timer_of_clk_init() does, I assume it should be a more correct variant. >>> >>> Sounds to me like this should be 2 patches, because you are changing the >>> value. This is not just purely cleanup IMO. >> >> Indeed, that could be at least mentioned in the commit message. Probably I just >> assumed that this is such a minor change that not worth anything. A hundred of >> microseconds is hardly noticeable. >> >> I'm not really sure if this really worth a re-spin at this point. Jon, are you insisting? > > At a minimum the changelog needs to be udpated to reflect what is going > on here. Yes it may not be a massive difference, but I prefer not to > change things without any rationale. Okay, I'll respin this series and probably will just drop the round-up. I'll also append the other two new patches "cycles can't be 0" and "max limit correction" to this series. Daniel, I'll also correct the "Fixes" tag to satisfy the linux-next patch checker.
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c index 810b4e7435cf..646b3530c2d2 100644 --- a/drivers/clocksource/timer-tegra.c +++ b/drivers/clocksource/timer-tegra.c @@ -71,9 +71,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) static int tegra_timer_set_periodic(struct clock_event_device *evt) { void __iomem *reg_base = timer_of_base(to_timer_of(evt)); + unsigned long period = timer_of_period(to_timer_of(evt)); - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), reg_base + TIMER_PTV); return 0; @@ -297,6 +297,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, cpu_to->clkevt.rating = rating; cpu_to->clkevt.cpumask = cpumask_of(cpu); cpu_to->of_base.base = timer_reg_base + base; + cpu_to->of_clk.period = DIV_ROUND_UP(rate, HZ); cpu_to->of_clk.rate = rate; irq_set_status_flags(cpu_to->clkevt.irq, IRQ_NOAUTOEN);
The of_clk structure has a period field that is set up initially by timer_of_clk_init(), that period value need to be adjusted for a case of TIMER1-9 that are running at a fixed rate that doesn't match the clock's rate. Note that the period value is currently used only by some of the clocksource drivers internally and hence this is just a minor cleanup change that doesn't fix anything. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/clocksource/timer-tegra.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)