From patchwork Mon Jan 28 09:18:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 1031782 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="rvtEnfU8"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43p3vw4tDvz9sBb for ; Mon, 28 Jan 2019 20:18:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726886AbfA1JSe (ORCPT ); Mon, 28 Jan 2019 04:18:34 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:4235 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726415AbfA1JSc (ORCPT ); Mon, 28 Jan 2019 04:18:32 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 28 Jan 2019 01:17:53 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Mon, 28 Jan 2019 01:18:31 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Mon, 28 Jan 2019 01:18:31 -0800 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 28 Jan 2019 09:18:31 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 28 Jan 2019 09:18:30 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Mon, 28 Jan 2019 09:18:30 +0000 Received: from josephl-linux.nvidia.com (Not Verified[10.19.108.132]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 28 Jan 2019 01:18:30 -0800 From: Joseph Lo To: Thierry Reding , Jonathan Hunter CC: , , Joseph Lo Subject: [PATCH V2 3/6] arm64: dts: tegra210: fix timer node Date: Mon, 28 Jan 2019 17:18:12 +0800 Message-ID: <20190128091815.7040-4-josephl@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190128091815.7040-1-josephl@nvidia.com> References: <20190128091815.7040-1-josephl@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1548667073; bh=oSs2GxA4T1rS7Z03+cb/ELec9MX/NjjwFBgEQ7Wz8Sk=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=rvtEnfU8sX2vbhGVKAFvHbqMD5trEmdv/oLamf+vKf3k/hEz1Mkz2Bo4gQ9XE1RGj LYbWcBfA5moJ3083mqD6Z8crzXBsMtDKDjTqP5qe2AbNcYJ8vZwLz3j5ZUJZO6B93V q0wDerxkxKkTb7GNfDJACUeWO3Zo/AxUEwyJdYZUvtRMm6EimggVCdpgJBjs5xD+Oj CYgGGe8+HF5xH8riqTPLn6d4z05nv3xhUIAztqc8OIMfZjy6HUHUXAisT51uHViak0 Gafb28zE2YsyMHqx0ErK+k+iSHym+dcRb+YLLuvKKdYSUqdXXwMFvKXyim6ochkZkb qI46lvsPsvK9g== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Fix timer node to make it work with Tegra210 timer driver. Signed-off-by: Joseph Lo --- v2: * list all the IRQs per each timer channels 0 through 13 * remove compatible string of "nvidia,tegra30-timer" --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index b5858b5ea052..2b387364afc3 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -384,14 +384,22 @@ }; timer@60005000 { - compatible = "nvidia,tegra210-timer", "nvidia,tegra20-timer"; + compatible = "nvidia,tegra210-timer"; reg = <0x0 0x60005000 0x0 0x400>; - interrupts = , + interrupts = , + , , , , , - ; + , + , + , + , + , + , + , + ; clocks = <&tegra_car TEGRA210_CLK_TIMER>; clock-names = "timer"; };