From patchwork Thu Jul 19 13:21:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 946300 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sd+OEi5b"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41WZSx4HRpz9s9G for ; Thu, 19 Jul 2018 23:22:57 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731865AbeGSOFv (ORCPT ); Thu, 19 Jul 2018 10:05:51 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:46613 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731846AbeGSOFu (ORCPT ); Thu, 19 Jul 2018 10:05:50 -0400 Received: by mail-lj1-f195.google.com with SMTP id 203-v6so7430584ljj.13; Thu, 19 Jul 2018 06:22:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iy0/BWeQr0SbOjZJetKjJ9Vt81xpcKueGzQTC6/ud8M=; b=sd+OEi5bTfHih9WxQhHt42dfwJWnUC5IxdRKbVFBGYvzYr81Ot8nAcz7L0dtpdl94v MEclbtomGUpobWcimbatoDC+hTv82Rdnqeu4a7Cmp5Loo+WIDbLGTF6EXZLbPb3lLwx8 DY4CqitNmff6VsYUm+NbHMX0MvebHAFrdP+AvUq+ySTu/t0uYERkwL/FJvNi1PFSQIbb 9FTuSGi4RZeikFcUCe8Ncf0Uz4xUn/6Mh63sTIhGUyUrIKJoUacJXXcVD1kseXvoVaj1 hYEAIY+8ZJdc7kRi1dyrb4OR0RQf3nCsXW5TvvNQ2NKofk6xxx/hN9UvY84E5jC00xs0 1qnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iy0/BWeQr0SbOjZJetKjJ9Vt81xpcKueGzQTC6/ud8M=; b=Hdxe2Kct/Md0RKtn/S4sxeiKkQHOR3wI5GMfizRyapisfkngyGtIxKeipMCPMw6//K nOWe7rcjSsmQy3KLG08SdrCGH2AEAEyt0uB9rUw4g4m7Gft38aWIqIResm+npXmKGCMK AMNWiOd6nJyg6xiloh9PCC9D8cq2MJevsNL+mP6f3WU+T3M1p3kRvnWo3IHYZ13g3eIr Y36LdhkQm87gWcSipsEZxI7pnGi0yu1fLKtBJ20S5sYktoAauKiPlVPT+FYPwRkyKJQd gXbaWk6Ao7YTfsQE+Ar7JxlbGnpAhgG59d+RTizJsuom9dTXVH6NUREMhdCT8tX9TrE0 HS2A== X-Gm-Message-State: AOUpUlFEBJLODeQ/M6rBlq7MaOVczrFe3xR7oil1w7LdxrwZmggAWJvy h+THargJA3EN75hd3CmsAOU= X-Google-Smtp-Source: AAOMgpdCGirIrzxG6vfHNm6YphWNST4C7zvMmr+dyipzLjwQOxirrfPht9X2BCeShpgPt9K7eCLS7w== X-Received: by 2002:a19:26d2:: with SMTP id m201-v6mr6499352lfm.43.1532006558197; Thu, 19 Jul 2018 06:22:38 -0700 (PDT) Received: from localhost.localdomain ([109.252.91.91]) by smtp.gmail.com with ESMTPSA id o4-v6sm1109592ljc.67.2018.07.19.06.22.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jul 2018 06:22:37 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Peter De Schrijver , Jonathan Hunter , Prashant Gaikwad , Michael Turquette , Stephen Boyd Cc: Rob Herring , linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 7/8] clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC Date: Thu, 19 Jul 2018 16:21:31 +0300 Message-Id: <20180719132132.16153-8-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180719132132.16153-1-digetx@gmail.com> References: <20180719132132.16153-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Ensure that direct PLLM sourcing is turned off for EMC as we don't support that configuration in the clk driver. Signed-off-by: Dmitry Osipenko Acked-by: Peter De Schrijver --- drivers/clk/tegra/clk-tegra20.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index ebea97016d58..e1f039aa8ca9 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -800,7 +800,9 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = { static void __init tegra20_emc_clk_init(void) { + const u32 use_pllm_ud = BIT(29); struct clk *clk; + u32 emc_reg; clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, ARRAY_SIZE(mux_pllmcp_clkm), @@ -812,6 +814,14 @@ static void __init tegra20_emc_clk_init(void) &emc_lock); clks[TEGRA20_CLK_MC] = clk; + /* un-divided pll_m_out0 is currently unsupported */ + emc_reg = readl_relaxed(clk_base + CLK_SOURCE_EMC); + if (emc_reg & use_pllm_ud) { + pr_err("%s: un-divided PllM_out0 used as clock source\n", + __func__); + return; + } + /* * Note that 'emc_mux' source and 'emc' rate shouldn't be changed at * the same time due to a HW bug, this won't happen because we're