From patchwork Fri Oct 13 15:49:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 825532 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="IW5OvTgw"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yDBz03Ht0z9sRm for ; Sat, 14 Oct 2017 02:51:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758287AbdJMPvI (ORCPT ); Fri, 13 Oct 2017 11:51:08 -0400 Received: from mail-qt0-f196.google.com ([209.85.216.196]:43727 "EHLO mail-qt0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758637AbdJMPti (ORCPT ); Fri, 13 Oct 2017 11:49:38 -0400 Received: by mail-qt0-f196.google.com with SMTP id j58so9283203qtj.0; Fri, 13 Oct 2017 08:49:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3ceB3JMtu3DN8bPS2wV2+ybMshAtL8y58DVOUL3N0ZQ=; b=IW5OvTgwFL67qhoWi3ipk5tfe7oMVWNcJk8feu5Cb95ThmFS6QXJY47CKyr4imeRuT ES5QCmpDumQsS9bt++e3dahjBb3WMOwe0fq1tsoTQ09C/S9mU3sZ45AHm+gYXY9PlDXQ HwieZyYjTH2mHXTfpm389jsKULUjDavH5GTBOK+s1b5ARIZxmhYSkGaOHR6v6fxWwGrq zZDp1sl+EhNNmZNFPQh317RC7xSwpZ6T6XioBNAKX9h3WcWtGbhAXrdZVxb7v2NpUQ1n /ItVQ653eDOVYwOYwmKRDIxv2i+NZlml4v694YH5Yeq17QUIAms+36SSPur9x8mgGzff zLtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3ceB3JMtu3DN8bPS2wV2+ybMshAtL8y58DVOUL3N0ZQ=; b=cMwyJ7zbccn782q3Lw6BpA0BL6WnHOqx30EgvIN/agywCIsR2mkes6zNzFNgxJzWOa mp51XSnxsMp88w4cn3nt3tJzGVQY95RFZt2oh4Zsf3v9j/n5sjVMT2BliFADF3GSeDvA W2vXsMfQmDcDT3sJXhgVMgtBycVm4i+ZQdSGXb0Eb/yeefJxrI95Mv3J0G4kT2ww3MxD a/wbK0W2qM4/0XvHMy5ID9ofuaNLNvlTQowoRUG1/OrmGX3JZiKEY9JHGpdj53SWnab5 xl8zJ2+gy6vcLYbQAq1oehNYUfGbAAow88XBVt1/MkrEe1UDndAfpbyASv33M/NcndVk 3iqQ== X-Gm-Message-State: AMCzsaWD7QGtop3IjtzeLB/NqDLC0NJmANfpQJoFMH7xUNMdW+k3d7fa LezV8zAvgL9VWI5rKZt/poUUdw== X-Google-Smtp-Source: AOwi7QBfbzCGrvJ1RcXbtWkxZYL6dx+Zh29Y9RLFEUrXjL6kJFdyLz7i41GXP7EvOuSyoUMZIlD5sQ== X-Received: by 10.200.15.83 with SMTP id l19mr2617796qtk.168.1507909777682; Fri, 13 Oct 2017 08:49:37 -0700 (PDT) Received: from localhost (p200300E41BE4FD00CEAD5B94E1CFD280.dip0.t-ipconnect.de. [2003:e4:1be4:fd00:cead:5b94:e1cf:d280]) by smtp.gmail.com with ESMTPSA id j19sm737753qtk.87.2017.10.13.08.49.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 13 Oct 2017 08:49:37 -0700 (PDT) From: Thierry Reding To: Linus Walleij Cc: Jonathan Hunter , Grygorii Strashko , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 08/13] gpio: Move irq_nested into struct gpio_irq_chip Date: Fri, 13 Oct 2017 17:49:08 +0200 Message-Id: <20171013154913.29448-9-thierry.reding@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171013154913.29448-1-thierry.reding@gmail.com> References: <20171013154913.29448-1-thierry.reding@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding --- drivers/gpio/gpiolib.c | 8 ++++---- include/linux/gpio/driver.h | 9 +++++++-- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 1ee52070d19d..f7a15f2fe36f 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1608,7 +1608,7 @@ void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip, struct irq_chip *irqchip, unsigned int parent_irq) { - if (!gpiochip->irq_nested) { + if (!gpiochip->irq.nested) { chip_err(gpiochip, "tried to nest a chained gpiochip\n"); return; } @@ -1643,7 +1643,7 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_set_lockdep_class(irq, chip->lock_key); irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler); /* Chips that use nested thread handlers have them marked */ - if (chip->irq_nested) + if (chip->irq.nested) irq_set_nested_thread(irq, 1); irq_set_noprobe(irq); @@ -1661,7 +1661,7 @@ static void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) { struct gpio_chip *chip = d->host_data; - if (chip->irq_nested) + if (chip->irq.nested) irq_set_nested_thread(irq, 0); irq_set_chip_and_handler(irq, NULL, NULL); irq_set_chip_data(irq, NULL); @@ -1796,7 +1796,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, pr_err("missing gpiochip .dev parent pointer\n"); return -EINVAL; } - gpiochip->irq_nested = nested; + gpiochip->irq.nested = nested; of_node = gpiochip->parent->of_node; #ifdef CONFIG_OF_GPIO /* diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 31785734462a..c1c54a13f0f7 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -100,6 +100,13 @@ struct gpio_irq_chip { * driver, so the core will only reference this list, not modify it. */ unsigned int *parents; + + /** + * @nested: + * + * True if set the interrupt handling is nested. + */ + bool nested; }; static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) @@ -169,7 +176,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) * safely. * @bgpio_dir: shadowed direction register for generic GPIO to clear/set * direction safely. - * @irq_nested: True if set the interrupt handling is nested. * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all * bits set to one * @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to @@ -241,7 +247,6 @@ struct gpio_chip { * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib * to handle IRQs for most practical cases. */ - bool irq_nested; bool irq_need_valid_mask; unsigned long *irq_valid_mask; struct lock_class_key *lock_key;