From patchwork Thu Jun 30 08:01:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 642413 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rgBqG6kRHz9sRZ for ; Thu, 30 Jun 2016 18:02:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751547AbcF3ICt (ORCPT ); Thu, 30 Jun 2016 04:02:49 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:12633 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751182AbcF3ICq (ORCPT ); Thu, 30 Jun 2016 04:02:46 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Thu, 30 Jun 2016 01:01:21 -0700 Received: from HQMAIL101.nvidia.com ([172.20.12.94]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 30 Jun 2016 01:01:34 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 30 Jun 2016 01:01:34 -0700 Received: from DRUKMAIL102.nvidia.com (10.25.59.20) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Thu, 30 Jun 2016 08:01:31 +0000 Received: from HQMAIL103.nvidia.com (172.20.187.11) by drukmail102.nvidia.com (10.25.59.20) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Thu, 30 Jun 2016 08:01:27 +0000 Received: from percival.nvidia.com (172.20.13.39) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1130.7 via Frontend Transport; Thu, 30 Jun 2016 08:01:25 +0000 From: Alexandre Courbot To: Stephen Warren , Thierry Reding , Jon Hunter , , , CC: Alexandre Courbot Subject: [PATCH] arm64: tegra: Enable all cores on Jetson TX1 Date: Thu, 30 Jun 2016 17:01:19 +0900 Message-ID: <20160630080119.27090-1-acourbot@nvidia.com> X-Mailer: git-send-email 2.9.0 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Enable PSCI firmware and all 4 cores of T210 on Jetson TX1. Signed-off-by: Alexandre Courbot --- Not sure why this was not done - in any case this seems to work fine and performance is obviously improved (especially boot time). arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index bb319daf6aa5..6e7fe0517e5c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -71,4 +71,27 @@ regulator-enable-ramp-delay = <1000>; }; }; + + cpus { + cpu@0 { + enable-method = "psci"; + }; + + cpu@1 { + enable-method = "psci"; + }; + + cpu@2 { + enable-method = "psci"; + }; + + cpu@3 { + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; };