| Message ID | 1649921757-16919-3-git-send-email-kkartik@nvidia.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/3] mailbox: tegra-hsp: Add tegra_hsp_sm_ops | expand |
On Thu, Apr 14, 2022 at 01:05:56PM +0530, Kartik wrote: > Tegra234 supports sending/receiving 32-bit and 128-bit data over > a shared mailbox. Based on the data size to be used, clients need > to specify the type of shared mailbox in the device tree. > > Add a macro for 128-bit shared mailbox. Mailbox clients can use this > macro as a flag in device tree to enable 128-bit data support for a > shared mailbox. > > Signed-off-by: Kartik <kkartik@nvidia.com> Need a full name here. > --- > .../devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml | 9 +++++++++ > include/dt-bindings/mailbox/tegra186-hsp.h | 5 +++++ > 2 files changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml > index 9f7a7296b57f..a3e87516d637 100644 > --- a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml > +++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml > @@ -26,6 +26,15 @@ description: | > second cell is used to identify the mailbox that the client is going > to use. > > + For shared mailboxes, the first cell composed of two fields: > + - bits 15..8: > + A bit mask of flags that further specifies the type of shared > + mailbox to be used (based on the data size). If no flag is > + specified then, 32-bit shared mailbox is used. > + - bits 7..0: > + Defines the type of the mailbox to be used. This field should be > + TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes. > + > For doorbells, the second cell specifies the index of the doorbell to > use. > > diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h b/include/dt-bindings/mailbox/tegra186-hsp.h > index 3bdec7a84d35..b9ccae2aa9e2 100644 > --- a/include/dt-bindings/mailbox/tegra186-hsp.h > +++ b/include/dt-bindings/mailbox/tegra186-hsp.h > @@ -15,6 +15,11 @@ > #define TEGRA_HSP_MBOX_TYPE_SS 0x2 > #define TEGRA_HSP_MBOX_TYPE_AS 0x3 > > +/* > + * These define the types of shared mailbox supported based on data size. > + */ > +#define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8) > + > /* > * These defines represent the bit associated with the given master ID in the > * doorbell registers. > -- > 2.17.1 > >
On 14/04/2022 13:53, Rob Herring wrote: >> Tegra234 supports sending/receiving 32-bit and 128-bit data over >> a shared mailbox. Based on the data size to be used, clients need >> to specify the type of shared mailbox in the device tree. >> >> Add a macro for 128-bit shared mailbox. Mailbox clients can use this >> macro as a flag in device tree to enable 128-bit data support for a >> shared mailbox. >> >> Signed-off-by: Kartik <kkartik@nvidia.com> > >Need a full name here. This is my legal name as per the government ID's. > >> --- >> .../devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml | 9 +++++++++ >> include/dt-bindings/mailbox/tegra186-hsp.h | 5 +++++ >> 2 files changed, 14 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml >> index 9f7a7296b57f..a3e87516d637 100644 >> --- a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml >> +++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml >> @@ -26,6 +26,15 @@ description: | >> second cell is used to identify the mailbox that the client is going >> to use. >> >> + For shared mailboxes, the first cell composed of two fields: >> + - bits 15..8: >> + A bit mask of flags that further specifies the type of shared >> + mailbox to be used (based on the data size). If no flag is >> + specified then, 32-bit shared mailbox is used. >> + - bits 7..0: >> + Defines the type of the mailbox to be used. This field should be >> + TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes. >> + >> For doorbells, the second cell specifies the index of the doorbell to >> use. >> >> diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h b/include/dt-bindings/mailbox/tegra186-hsp.h >> index 3bdec7a84d35..b9ccae2aa9e2 100644 >> --- a/include/dt-bindings/mailbox/tegra186-hsp.h >> +++ b/include/dt-bindings/mailbox/tegra186-hsp.h >> @@ -15,6 +15,11 @@ >> #define TEGRA_HSP_MBOX_TYPE_SS 0x2 >> #define TEGRA_HSP_MBOX_TYPE_AS 0x3 >> >> +/* >> + * These define the types of shared mailbox supported based on data size. >> + */ >> +#define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8) >> + >> /* >> * These defines represent the bit associated with the given master ID in the >> * doorbell registers. >> -- >> 2.17.1 >> >>
On Thu, Apr 14, 2022 at 01:05:56PM +0530, Kartik wrote: > Tegra234 supports sending/receiving 32-bit and 128-bit data over > a shared mailbox. Based on the data size to be used, clients need > to specify the type of shared mailbox in the device tree. > > Add a macro for 128-bit shared mailbox. Mailbox clients can use this > macro as a flag in device tree to enable 128-bit data support for a > shared mailbox. > > Signed-off-by: Kartik <kkartik@nvidia.com> > --- > .../devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml | 9 +++++++++ > include/dt-bindings/mailbox/tegra186-hsp.h | 5 +++++ > 2 files changed, 14 insertions(+) Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml index 9f7a7296b57f..a3e87516d637 100644 --- a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml +++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml @@ -26,6 +26,15 @@ description: | second cell is used to identify the mailbox that the client is going to use. + For shared mailboxes, the first cell composed of two fields: + - bits 15..8: + A bit mask of flags that further specifies the type of shared + mailbox to be used (based on the data size). If no flag is + specified then, 32-bit shared mailbox is used. + - bits 7..0: + Defines the type of the mailbox to be used. This field should be + TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes. + For doorbells, the second cell specifies the index of the doorbell to use. diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h b/include/dt-bindings/mailbox/tegra186-hsp.h index 3bdec7a84d35..b9ccae2aa9e2 100644 --- a/include/dt-bindings/mailbox/tegra186-hsp.h +++ b/include/dt-bindings/mailbox/tegra186-hsp.h @@ -15,6 +15,11 @@ #define TEGRA_HSP_MBOX_TYPE_SS 0x2 #define TEGRA_HSP_MBOX_TYPE_AS 0x3 +/* + * These define the types of shared mailbox supported based on data size. + */ +#define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8) + /* * These defines represent the bit associated with the given master ID in the * doorbell registers.
Tegra234 supports sending/receiving 32-bit and 128-bit data over a shared mailbox. Based on the data size to be used, clients need to specify the type of shared mailbox in the device tree. Add a macro for 128-bit shared mailbox. Mailbox clients can use this macro as a flag in device tree to enable 128-bit data support for a shared mailbox. Signed-off-by: Kartik <kkartik@nvidia.com> --- .../devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml | 9 +++++++++ include/dt-bindings/mailbox/tegra186-hsp.h | 5 +++++ 2 files changed, 14 insertions(+)