| Message ID | 1637573292-13214-2-git-send-email-akhilrajeev@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add NVIDIA Tegra GPC-DMA driver | expand |
On Mon, 22 Nov 2021 14:58:09 +0530, Akhil R wrote: > Add DT binding document for Nvidia Tegra GPCDMA controller. > > Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com> > Signed-off-by: Akhil R <akhilrajeev@nvidia.com> > Reviewed-by: Jon Hunter <jonathanh@nvidia.com> > --- > .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 111 +++++++++++++++++++++ > 1 file changed, 111 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: ./Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml:26:10: [warning] wrong indentation: expected 10 but found 9 (indentation) dtschema/dtc warnings/errors: doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1557933 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Mon, Nov 22, 2021 at 02:58:09PM +0530, Akhil R wrote: > Add DT binding document for Nvidia Tegra GPCDMA controller. > > Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com> > Signed-off-by: Akhil R <akhilrajeev@nvidia.com> > Reviewed-by: Jon Hunter <jonathanh@nvidia.com> > --- > .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 111 +++++++++++++++++++++ > 1 file changed, 111 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > new file mode 100644 > index 0000000..3a5a70d > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > @@ -0,0 +1,111 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings > + > +description: | > + The Tegra General Purpose Central (GPC) DMA controller is used for faster > + data transfers between memory to memory, memory to device and device to > + memory. > + > +maintainers: > + - Jon Hunter <jonathanh@nvidia.com> > + - Rajesh Gumasta <rgumasta@nvidia.com> > + > +allOf: > + - $ref: "dma-controller.yaml#" > + > +properties: > + compatible: > + oneOf: > + - const: nvidia,tegra186-gpcdma > + - items: > + - const: nvidia,tegra186-gpcdma > + - const: nvidia,tegra194-gpcdma Still not how 'compatible' works nor what I wrote out for you. Rob
> On Mon, Nov 22, 2021 at 02:58:09PM +0530, Akhil R wrote: > > Add DT binding document for Nvidia Tegra GPCDMA controller. > > > > Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com> > > Signed-off-by: Akhil R <akhilrajeev@nvidia.com> > > Reviewed-by: Jon Hunter <jonathanh@nvidia.com> > > --- > > .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 111 > +++++++++++++++++++++ > > 1 file changed, 111 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > new file mode 100644 > > index 0000000..3a5a70d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.ya > > +++ ml > > @@ -0,0 +1,111 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings > > + > > +description: | > > + The Tegra General Purpose Central (GPC) DMA controller is used for > > +faster > > + data transfers between memory to memory, memory to device and > > +device to > > + memory. > > + > > +maintainers: > > + - Jon Hunter <jonathanh@nvidia.com> > > + - Rajesh Gumasta <rgumasta@nvidia.com> > > + > > +allOf: > > + - $ref: "dma-controller.yaml#" > > + > > +properties: > > + compatible: > > + oneOf: > > + - const: nvidia,tegra186-gpcdma > > + - items: > > + - const: nvidia,tegra186-gpcdma > > + - const: nvidia,tegra194-gpcdma > > Still not how 'compatible' works nor what I wrote out for you. I thought '186' and '194' got interchanged in your previous comment because it is 194 which is the superset of 186 and have got more features than 186. Or probably I did not understand the idea correctly yet.
On 29/11/2021 05:01, Akhil R wrote: >> On Mon, Nov 22, 2021 at 02:58:09PM +0530, Akhil R wrote: >>> Add DT binding document for Nvidia Tegra GPCDMA controller. >>> >>> Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com> >>> Signed-off-by: Akhil R <akhilrajeev@nvidia.com> >>> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> >>> --- >>> .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 111 >> +++++++++++++++++++++ >>> 1 file changed, 111 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml >>> >>> diff --git >>> a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml >>> b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml >>> new file mode 100644 >>> index 0000000..3a5a70d >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.ya >>> +++ ml >>> @@ -0,0 +1,111 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 >>> +--- >>> +$id: https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdma%2Fnvidia%2Ctegra186-gpc-dma.yaml%23&data=04%7C01%7Cjonathanh%40nvidia.com%7Cd1e0c14ac72b4c24976908d9b2f53fb1%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637737588681303734%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=6qMb%2B0Lr3PMMvh5WrdTUEXC76qYo5rJKnG8DisYI5js%3D&reserved=0 >>> +$schema: https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7Cjonathanh%40nvidia.com%7Cd1e0c14ac72b4c24976908d9b2f53fb1%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637737588681303734%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=TktMUBi4U%2B%2B58D%2FJqGY4v9B78cYVMZeXP6pLM1CkGe0%3D&reserved=0 >>> + >>> +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings >>> + >>> +description: | >>> + The Tegra General Purpose Central (GPC) DMA controller is used for >>> +faster >>> + data transfers between memory to memory, memory to device and >>> +device to >>> + memory. >>> + >>> +maintainers: >>> + - Jon Hunter <jonathanh@nvidia.com> >>> + - Rajesh Gumasta <rgumasta@nvidia.com> >>> + >>> +allOf: >>> + - $ref: "dma-controller.yaml#" >>> + >>> +properties: >>> + compatible: >>> + oneOf: >>> + - const: nvidia,tegra186-gpcdma >>> + - items: >>> + - const: nvidia,tegra186-gpcdma >>> + - const: nvidia,tegra194-gpcdma >> >> Still not how 'compatible' works nor what I wrote out for you. > I thought '186' and '194' got interchanged in your previous comment because it is 194 > which is the superset of 186 and have got more features than 186. > Or probably I did not understand the idea correctly yet. Hi Rob, this is the way around that we want it. Tegra194 is backward compatible with Tegra186. The above does align with what you mentioned before, so I am also not clear what the issue is with the above? Jon
On 30/11/2021 09:34, Jon Hunter wrote: ... >>>> +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings >>>> + >>>> +description: | >>>> + The Tegra General Purpose Central (GPC) DMA controller is used for >>>> +faster >>>> + data transfers between memory to memory, memory to device and >>>> +device to >>>> + memory. >>>> + >>>> +maintainers: >>>> + - Jon Hunter <jonathanh@nvidia.com> >>>> + - Rajesh Gumasta <rgumasta@nvidia.com> >>>> + >>>> +allOf: >>>> + - $ref: "dma-controller.yaml#" >>>> + >>>> +properties: >>>> + compatible: >>>> + oneOf: >>>> + - const: nvidia,tegra186-gpcdma >>>> + - items: >>>> + - const: nvidia,tegra186-gpcdma >>>> + - const: nvidia,tegra194-gpcdma >>> >>> Still not how 'compatible' works nor what I wrote out for you. >> I thought '186' and '194' got interchanged in your previous comment >> because it is 194 >> which is the superset of 186 and have got more features than 186. >> Or probably I did not understand the idea correctly yet. > > Hi Rob, this is the way around that we want it. Tegra194 is backward > compatible with Tegra186. The above does align with what you mentioned > before, so I am also not clear what the issue is with the above? Now I think I understand. It is the order of the 'items' here that is key. So what we want is ... compatible: oneOf: - const: nvidia,tegra186-gpcdma - items: - const: nvidia,tegra194-gpcdma - const: nvidia,tegra186-gpcdma At least this makes the dt_binding_check happy :-) Jon
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml new file mode 100644 index 0000000..3a5a70d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings + +description: | + The Tegra General Purpose Central (GPC) DMA controller is used for faster + data transfers between memory to memory, memory to device and device to + memory. + +maintainers: + - Jon Hunter <jonathanh@nvidia.com> + - Rajesh Gumasta <rgumasta@nvidia.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + oneOf: + - const: nvidia,tegra186-gpcdma + - items: + - const: nvidia,tegra186-gpcdma + - const: nvidia,tegra194-gpcdma + + "#dma-cells": + const: 1 + + reg: + maxItems: 1 + + interrupts: + description: + Should contain all of the per-channel DMA interrupts in + ascending order with respect to the DMA channel index. + minItems: 1 + maxItems: 32 + + resets: + maxItems: 1 + + reset-names: + const: gpcdma + + iommus: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg + - interrupts + - resets + - reset-names + - "#dma-cells" + - iommus + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/tegra186-mc.h> + #include <dt-bindings/reset/tegra186-reset.h> + + dma-controller@2600000 { + compatible = "nvidia,tegra186-gpcdma"; + reg = <0x2600000 0x0>; + resets = <&bpmp TEGRA186_RESET_GPCDMA>; + reset-names = "gpcdma"; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + iommus = <&smmu TEGRA186_SID_GPCDMA_0>; + dma-coherent; + }; +...