watchdog: tegra: Stop watchdog first if restarting

If we need to restart the watchdog due to someone changing the timeout
interval, stop the watchdog before restarting it.  Otherwise, the new
timeout doesn't seem to take.

Signed-off-by: Andrew Chew <achew@nvidia.com>
---
 drivers/watchdog/tegra_wdt.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

On 11/09/2015 04:11 PM, Andrew Chew wrote:
> If we need to restart the watchdog due to someone changing the timeout
> interval, stop the watchdog before restarting it.  Otherwise, the new
> timeout doesn't seem to take.
>
> Signed-off-by: Andrew Chew <achew@nvidia.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

Some feedback from the maintainers would be helpful, though,
especially if there is some other means to change the timeout
without stopping the watchdog.

Guenter

> ---
>   drivers/watchdog/tegra_wdt.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/tegra_wdt.c b/drivers/watchdog/tegra_wdt.c
> index 7f97cdd..9ec5760 100644
> --- a/drivers/watchdog/tegra_wdt.c
> +++ b/drivers/watchdog/tegra_wdt.c
> @@ -140,8 +140,10 @@ static int tegra_wdt_set_timeout(struct watchdog_device *wdd,
>   {
>   	wdd->timeout = timeout;
>
> -	if (watchdog_active(wdd))
> +	if (watchdog_active(wdd)) {
> +		tegra_wdt_stop(wdd);
>   		return tegra_wdt_start(wdd);
> +	}
>
>   	return 0;
>   }
>

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On Fri, Nov 13, 2015 at 11:52:30AM -0800, Guenter Roeck wrote:
> On 11/09/2015 04:11 PM, Andrew Chew wrote:
> >If we need to restart the watchdog due to someone changing the timeout
> >interval, stop the watchdog before restarting it.  Otherwise, the new
> >timeout doesn't seem to take.
> >
> >Signed-off-by: Andrew Chew <achew@nvidia.com>
> 
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> 
> Some feedback from the maintainers would be helpful, though,
> especially if there is some other means to change the timeout
> without stopping the watchdog.

I don't think there is. The TIMER_WDT<w>_COMMAND_0 register has this
description:

	"The StartCounter bit enables watchdog counter operation, loads
	the watchdog counter, starts the watchdog timer to count down,
	resets the expiration count to 0, and clears all flags. Also
	used as restart.
	
	..."

The way I read this is that the watchdog period (the field that the
wdd->timeout value gets written to) is latched when the StartCounter
bit transitions from 0 to 1. So this change looks correct to me:

Reviewed-by: Thierry Reding <treding@nvidia.com>

Andrew, it might be worthwhile to file an internal bug report to see if
we can get the TRM updated with a more explicit programming sequence or
at least get confirmation from one of the hardware designers whether or
not this is the correct sequence when changing the period.

Thierry