From patchwork Mon May 11 01:38:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 470578 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DC564140187 for ; Mon, 11 May 2015 11:38:45 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752081AbbEKBio (ORCPT ); Sun, 10 May 2015 21:38:44 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:14695 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751771AbbEKBik (ORCPT ); Sun, 10 May 2015 21:38:40 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Sun, 10 May 2015 18:38:35 -0700 Received: from hqemhub02.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Sun, 10 May 2015 18:37:01 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Sun, 10 May 2015 18:37:01 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.342.0; Sun, 10 May 2015 18:38:39 -0700 Received: from markz-hp6200.nvidia.com (Not Verified[10.19.224.127]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Sun, 10 May 2015 18:38:39 -0700 From: Mark Zhang To: thierry.reding@gmail.com CC: linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [RFC PATCH 05/12] dt: panel: Add property "te-polarity" Date: Mon, 11 May 2015 09:38:24 +0800 Message-ID: <1431308311-4470-6-git-send-email-markz@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1431308311-4470-1-git-send-email-markz@nvidia.com> References: <1431308311-4470-1-git-send-email-markz@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org te-polarity indicates the polarity of panel's TE(Tearing Effect) signal. Normally the TE pin is connected to the host SoC. The display controller will send a new frame to panel when the TE signal is triggered. Signed-off-by: Mark Zhang --- Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt | 2 ++ arch/arm/boot/dts/tegra114-dalmore.dts | 2 ++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt b/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt index f522bb8e47e1..680ebec9a927 100644 --- a/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt +++ b/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt @@ -23,6 +23,7 @@ Required properties (for DSI-LINK1 only): - link2: phandle to the DSI peripheral on the secondary link. Note that the presence of this property marks the containing node as DSI-LINK1. - power-supply: phandle of the regulator that provides the supply voltage +- te-polarity: indicates the TE(Tearing Effect) polarity. 0: Low, 1: High. Optional properties (for DSI-LINK1 only): - backlight: phandle of the backlight device attached to the panel @@ -38,6 +39,7 @@ Example: power-supply = <...>; backlight = <...>; + te-polarity = <0>; }; }; diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 8b7aa0dcdc6e..fdb1cc4063a9 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -47,6 +47,8 @@ power-supply = <&avdd_lcd_reg>; backlight = <&backlight>; + + te-polarity = <0>; /* TE_POLARITY_LOW */ }; }; };