From patchwork Wed Nov 12 07:56:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 409879 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5A70C140082 for ; Wed, 12 Nov 2014 19:01:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752789AbaKLIBU (ORCPT ); Wed, 12 Nov 2014 03:01:20 -0500 Received: from mail-wi0-f181.google.com ([209.85.212.181]:35326 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752524AbaKLH7M (ORCPT ); Wed, 12 Nov 2014 02:59:12 -0500 Received: by mail-wi0-f181.google.com with SMTP id n3so3971127wiv.2 for ; Tue, 11 Nov 2014 23:59:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=it/N2daW/Edvfu+xoN0ayiR1DoSbr8hJzxdOKnkpMV8=; b=C5MlurQS8doYEvgxDpwDzMQu2Q7Q80sALPSozXzxdl2lD45J6PhjKBOJSMkQ51d7nI 2aP5SqN5fe4+w2hg55hv95uP4Dgk3dMjvmRExsPzYJrNmYbUHP4EEMgro61n0Y+xeOjP Ky2xm1XcnJiyA+7J6FjQ4icJIf3uyZ51jkJ0XfuxcUiTiOfuesbG6VCpGmkIoPO814/P q02v74tkdV90kjqixGOeI4RMHGlmiOzCk9mQDlnZ5YBAW4RH18hMMujhyTK4HrTvDrio KTHvsHmysaD+tWvnqBgEH9oM9s2skFqs/4pzIxxJgWsJjYsc3RlDnQ/Z5rRYEOl8KVmq IdKA== X-Received: by 10.194.241.194 with SMTP id wk2mr22028839wjc.132.1415779150969; Tue, 11 Nov 2014 23:59:10 -0800 (PST) Received: from cizrna.lan (37-48-38-232.tmcz.cz. [37.48.38.232]) by mx.google.com with ESMTPSA id cz3sm30351656wjb.23.2014.11.11.23.59.07 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Nov 2014 23:59:09 -0800 (PST) From: Tomeu Vizoso To: linux-tegra@vger.kernel.org Cc: Javier Martinez Canillas , mikko.perttunen@kapsi.fi, acourbot@nvidia.com, Mikko Perttunen , Tomeu Vizoso , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Stephen Warren , Thierry Reding , Alexandre Courbot , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 07/13] ARM: tegra: Add EMC to Tegra124 device tree Date: Wed, 12 Nov 2014 08:56:30 +0100 Message-Id: <1415779051-26410-8-git-send-email-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1415779051-26410-1-git-send-email-tomeu.vizoso@collabora.com> References: <1415779051-26410-1-git-send-email-tomeu.vizoso@collabora.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Mikko Perttunen This adds a node for the EMC memory controller. It is always enabled, but only provides read-only functionality without board-specific timing tables. Signed-off-by: Mikko Perttunen Signed-off-by: Tomeu Vizoso --- arch/arm/boot/dts/tegra124.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 652f595..59e339d 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -567,6 +567,13 @@ #iommu-cells = <1>; }; + emc@0,7001b000 { + compatible = "nvidia,tegra124-emc"; + reg = <0x0 0x7001b000 0x0 0x1000>; + + nvidia,memory-controller = <&mc>; + }; + sata@0,70020000 { compatible = "nvidia,tegra124-ahci";