From patchwork Thu Dec 19 16:06:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 303610 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 555E72C0091 for ; Fri, 20 Dec 2013 03:08:14 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932152Ab3LSQIG (ORCPT ); Thu, 19 Dec 2013 11:08:06 -0500 Received: from mail-bk0-f51.google.com ([209.85.214.51]:54819 "EHLO mail-bk0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932153Ab3LSQIC (ORCPT ); Thu, 19 Dec 2013 11:08:02 -0500 Received: by mail-bk0-f51.google.com with SMTP id 6so770736bkj.24 for ; Thu, 19 Dec 2013 08:08:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=e24f4GS4CdWNi2Dc+j+FjTqibJ0DcVJ8t9ijvcZAbaA=; b=ZL9E/fADZUci1dgtTWieGy8FWRKwGXfg7JIOrydw/vMGufTeAWN9y3ejpOlf+Wc78n Onj8i65XeSz2umvYvGMoz3UsioNf3D1KvHtsBVOLTZqORPALVBVHYZXJE5cTsUzgdYgf JPNB6S/T0/pPwqHsWHL8VwSwsKmKahff7iEf8HFGzmF5ArT8bNHA4IpCWcz6CxaNb3hN TlEFxjzDCAf+yxV8oioZeamIvaNRYQdM0Jo9kPAICItwHVMjTM06A8aZ51kSSpWmOFLX qDwHMsOJXs3x3GOK0zQgWkHVPQf8RRxb7zv1WaE7agsGxetAfY4l+2g39BOmEWou3/oE fObQ== X-Received: by 10.204.234.3 with SMTP id ka3mr1808869bkb.18.1387469280781; Thu, 19 Dec 2013 08:08:00 -0800 (PST) Received: from localhost (port-10467.pppoe.wtnet.de. [84.46.41.12]) by mx.google.com with ESMTPSA id bf8sm3936602bkb.14.2013.12.19.08.07.59 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Dec 2013 08:08:00 -0800 (PST) From: Thierry Reding To: Stephen Warren Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 05/10] ARM: tegra: Enable eDP for Venice2 Date: Thu, 19 Dec 2013 17:06:17 +0100 Message-Id: <1387469182-14398-6-git-send-email-treding@nvidia.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1387469182-14398-1-git-send-email-treding@nvidia.com> References: <1387469182-14398-1-git-send-email-treding@nvidia.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the Tegra124. The panel has an EDID to describe the video timings but needs a few extra nodes to get the backlight to come up. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124-venice2.dts | 52 ++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 7a4d5e23ddf4..b435cb5ec664 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -10,6 +10,20 @@ reg = <0x80000000 0x80000000>; }; + host1x@50000000 { + sor@54540000 { + status = "okay"; + + nvidia,dpaux = <&dpaux>; + nvidia,panel = <&panel>; + }; + + dpaux: dpaux@545c0000 { + vdd-supply = <&vdd_edp>; + status = "okay"; + }; + }; + pinmux: pinmux@70000868 { pinctrl-names = "default"; pinctrl-0 = <&pinmux_default>; @@ -594,6 +608,17 @@ }; }; + backlight: backlight { + compatible = "pwm-backlight"; + + enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + power-supply = <&vdd_led>; + pwms = <&pwm 1 1000000>; + + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; @@ -607,6 +632,13 @@ }; }; + panel: panel { + compatible = "lg,lp129qe", "simple-panel"; + + backlight = <&backlight>; + ddc-i2c-bus = <&dpaux>; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -617,6 +649,26 @@ reg = <0>; regulator-name = "sys_5v"; }; + + vdd_edp: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "avdd_lcd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pmic 4 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vdd_led: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "vdd_led"; + regulator-min-microvolt = <45000000>; + regulator-max-microvolt = <45000000>; + gpio = <&gpio TEGRA_GPIO(P, 2) 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; sound {