@@ -56,6 +56,8 @@
#define IO_DPD2_STATUS 0x1c4
#define SEL_DPD_TIM 0x1c8
+#define GPU_RG_CNTRL 0x2d4
+
static int tegra_num_powerdomains;
static int tegra_num_cpu_domains;
static const u8 *tegra_cpu_domains;
@@ -152,6 +154,17 @@ int tegra_powergate_remove_clamping(int id)
return -EINVAL;
/*
+ * The Tegra124 GPU has a separate register (with different semantics)
+ * to remove clamps.
+ */
+ if (tegra_chip_id == TEGRA124) {
+ if (id == TEGRA_POWERGATE_3D) {
+ pmc_write(0, GPU_RG_CNTRL);
+ return 0;
+ }
+ }
+
+ /*
* Tegra 2 has a bug where PCIE and VDE clamping masks are
* swapped relatively to the partition ids
*/
A separate register is used to remove the clamps for the GPU on Tegra124. In order to be able to use the same API, special-case this particular partition. Signed-off-by: Thierry Reding <treding@nvidia.com> --- arch/arm/mach-tegra/powergate.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)