From patchwork Fri Dec 13 16:31:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 301096 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DD3E82C00A2 for ; Sat, 14 Dec 2013 03:32:31 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752192Ab3LMQcX (ORCPT ); Fri, 13 Dec 2013 11:32:23 -0500 Received: from mail-bk0-f47.google.com ([209.85.214.47]:48736 "EHLO mail-bk0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751849Ab3LMQcW (ORCPT ); Fri, 13 Dec 2013 11:32:22 -0500 Received: by mail-bk0-f47.google.com with SMTP id mx12so1442096bkb.6 for ; Fri, 13 Dec 2013 08:32:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=MArD5E39FCg7K+gFMyX72Izp3aIdH1GYD26coWt4YCY=; b=CePOuTvI6L3BA4F800yLeImIeqNZoycoy0EShr4RmNXasTOMRmAJ3SocNp+WcABS8W AasV0sf4fRaWy+YdaG3za6meCdpKMg/ZxMU7LvjwXwQNQsLHWnnZvfzYFihiAgnI9/jy eFWvn2+W/DFvEIFpMAzkegqHvujKp9iKqucuDY9zYC4lUCv2XkrOLN89BsuAe3UvVVuc jl3p8J8nKdkVDsDE/eAMropzo3xlWQQUZkvL8q3lLveMkRMocNWOug14TI1Xhlp/jJQt MJ5bqDkDt1vRkvep0BiaeCPBBNgeZa3b53r3MWntZKIOou2X3bzaxKq/amGInOhRQcQr INow== X-Received: by 10.205.0.135 with SMTP id nm7mr81951bkb.147.1386952340946; Fri, 13 Dec 2013 08:32:20 -0800 (PST) Received: from localhost (port-12927.pppoe.wtnet.de. [84.46.50.177]) by mx.google.com with ESMTPSA id o5sm2396269bkz.4.2013.12.13.08.32.19 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Dec 2013 08:32:19 -0800 (PST) From: Thierry Reding To: Stephen Warren Cc: linux-tegra@vger.kernel.org Subject: [PATCH 1/2] ARM: tegra: Add Tegra124 powergate support Date: Fri, 13 Dec 2013 17:31:03 +0100 Message-Id: <1386952264-6773-1-git-send-email-treding@nvidia.com> X-Mailer: git-send-email 1.8.4.2 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Three new gates have been added for Tegra124: SOR, VIC and IRAM. In addition, PCIe and SATA gates are again supported, like on Tegra20 and Tegra30. Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/powergate.c | 42 +++++++++++++++++++++++++++++++++++++++++ include/linux/tegra-powergate.h | 3 +++ 2 files changed, 45 insertions(+) diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 547f63f69f1e..dd0d52b329de 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -74,6 +74,13 @@ static const u8 tegra114_cpu_domains[] = { TEGRA_POWERGATE_CPU3, }; +static const u8 tegra124_cpu_domains[] = { + TEGRA_POWERGATE_CPU0, + TEGRA_POWERGATE_CPU1, + TEGRA_POWERGATE_CPU2, + TEGRA_POWERGATE_CPU3, +}; + static DEFINE_SPINLOCK(tegra_powergate_lock); static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); @@ -221,6 +228,11 @@ int __init tegra_powergate_init(void) tegra_num_cpu_domains = 4; tegra_cpu_domains = tegra114_cpu_domains; break; + case TEGRA124: + tegra_num_powerdomains = 25; + tegra_num_cpu_domains = 4; + tegra_cpu_domains = tegra124_cpu_domains; + break; default: /* Unknown Tegra variant. Disable powergating */ tegra_num_powerdomains = 0; @@ -282,6 +294,33 @@ static const char * const powergate_name_t114[] = { [TEGRA_POWERGATE_XUSBC] = "xusbc", }; +static const char * const powergate_name_t124[] = { + [TEGRA_POWERGATE_CPU] = "crail", + [TEGRA_POWERGATE_3D] = "3d", + [TEGRA_POWERGATE_VENC] = "venc", + [TEGRA_POWERGATE_PCIE] = "pcie", + [TEGRA_POWERGATE_VDEC] = "vdec", + [TEGRA_POWERGATE_L2] = "l2", + [TEGRA_POWERGATE_MPE] = "mpe", + [TEGRA_POWERGATE_HEG] = "heg", + [TEGRA_POWERGATE_SATA] = "sata", + [TEGRA_POWERGATE_CPU1] = "cpu1", + [TEGRA_POWERGATE_CPU2] = "cpu2", + [TEGRA_POWERGATE_CPU3] = "cpu3", + [TEGRA_POWERGATE_CELP] = "celp", + [TEGRA_POWERGATE_CPU0] = "cpu0", + [TEGRA_POWERGATE_C0NC] = "c0nc", + [TEGRA_POWERGATE_C1NC] = "c1nc", + [TEGRA_POWERGATE_SOR] = "sor", + [TEGRA_POWERGATE_DIS] = "dis", + [TEGRA_POWERGATE_DISB] = "disb", + [TEGRA_POWERGATE_XUSBA] = "xusba", + [TEGRA_POWERGATE_XUSBB] = "xusbb", + [TEGRA_POWERGATE_XUSBC] = "xusbc", + [TEGRA_POWERGATE_VIC] = "vic", + [TEGRA_POWERGATE_IRAM] = "iram", +}; + static int powergate_show(struct seq_file *s, void *data) { int i; @@ -326,6 +365,9 @@ int __init tegra_powergate_debugfs_init(void) case TEGRA114: powergate_name = powergate_name_t114; break; + case TEGRA124: + powergate_name = powergate_name_t124; + break; } if (powergate_name) { diff --git a/include/linux/tegra-powergate.h b/include/linux/tegra-powergate.h index faa2bdb090d7..e6f2ab3014a7 100644 --- a/include/linux/tegra-powergate.h +++ b/include/linux/tegra-powergate.h @@ -38,11 +38,14 @@ struct reset_control; #define TEGRA_POWERGATE_CPU0 14 #define TEGRA_POWERGATE_C0NC 15 #define TEGRA_POWERGATE_C1NC 16 +#define TEGRA_POWERGATE_SOR 17 #define TEGRA_POWERGATE_DIS 18 #define TEGRA_POWERGATE_DISB 19 #define TEGRA_POWERGATE_XUSBA 20 #define TEGRA_POWERGATE_XUSBB 21 #define TEGRA_POWERGATE_XUSBC 22 +#define TEGRA_POWERGATE_VIC 23 +#define TEGRA_POWERGATE_IRAM 24 #define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D