diff mbox

[V2] ARM: tegra: fix pinctrl misconfiguration on Venic2

Message ID 1386886322-2700-1-git-send-email-swarren@wwwdotorg.org
State Accepted, archived
Headers show

Commit Message

Stephen Warren Dec. 12, 2013, 10:12 p.m. UTC 
From: Stephen Warren <swarren@nvidia.com>

Other boards use PULL_NONE for their debug UART pins, and without this
change, the board doesn't accept any serial input.

Don't set the I2S port pins to tristate mode, or no audio signal will
be sent out.

Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2: Added fix for I2S port.

Laxman, can you please go through the whole pinctrl configuration for
Venice2 and make sure it's correct. Perhaps the best approach would be
to compare it against our downstream kernels for this board.
---
 arch/arm/boot/dts/tegra124-venice2.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Laxman Dewangan Dec. 13, 2013, 6:25 a.m. UTC | #1 
On Friday 13 December 2013 03:42 AM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> Other boards use PULL_NONE for their debug UART pins, and without this
> change, the board doesn't accept any serial input.
>
> Don't set the I2S port pins to tristate mode, or no audio signal will
> be sent out.
>
> Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> v2: Added fix for I2S port.
>
> Laxman, can you please go through the whole pinctrl configuration for
> Venice2 and make sure it's correct. Perhaps the best approach would be
> to compare it against our downstream kernels for this board.
The patch is generated based on downstream ref platforms setting,
Let me again check with very similar board in dowsntream.
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Stephen Warren Dec. 13, 2013, 4:59 p.m. UTC | #2 
On 12/12/2013 11:25 PM, Laxman Dewangan wrote:
> On Friday 13 December 2013 03:42 AM, Stephen Warren wrote:
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> Other boards use PULL_NONE for their debug UART pins, and without this
>> change, the board doesn't accept any serial input.
>>
>> Don't set the I2S port pins to tristate mode, or no audio signal will
>> be sent out.
>>
>> Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>> ---
>> v2: Added fix for I2S port.
>>
>> Laxman, can you please go through the whole pinctrl configuration for
>> Venice2 and make sure it's correct. Perhaps the best approach would be
>> to compare it against our downstream kernels for this board.
>
> The patch is generated based on downstream ref platforms setting,
> Let me again check with very similar board in dowsntream.

Oh, you mean this isn't a pinctrl configuration for Venice2 then? As you
know, we do have a separate downstream kernel with full Venice2 support;
you should use that as a reference.
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Thierry Reding Dec. 13, 2013, 7:55 p.m. UTC | #3 
On Thu, Dec 12, 2013 at 03:12:02PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>

Just in case you ever wanted to rebase this: s/Venic2/Venice2/

Thierry
diff mbox

Patch

diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 616759c3c7e5..b31e18798be7 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -40,7 +40,7 @@ 
 				nvidia,function = "i2s1";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-				nvidia,tristate = <TEGRA_PIN_ENABLE>;
+				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
 			dvfs_pwm_px0 {
 				nvidia,pins = "dvfs_pwm_px0";
@@ -250,7 +250,7 @@ 
 					      "pu3";
 				nvidia,function = "uarta";
 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-				nvidia,pull = <TEGRA_PIN_PULL_UP>;
+				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 			};
 			uart2_cts_n_pj5 {