| Message ID | 1385990934-20809-1-git-send-email-treding@nvidia.com |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Stephen Warren |
| Headers | show |
On Dec 2, 2013, at 7:28 AM, Thierry Reding <thierry.reding@gmail.com> wrote: > Introduce device tree bindings for the MIPI pad calibration controller > found on Tegra SoCs. The controller can be used to perform calibration > of pads used for DSI and CSI peripherals. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > .../bindings/misc/nvidia,tegra114-mipi.txt | 37 ++++++++++++++++++++++ Should this just be nvidia,tegra-mipi.txt (as you have it supported for tegra<chip>)? > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt Is this really pad control or pin? I ask as its rare to see pad control. > > diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > new file mode 100644 > index 000000000000..beb75ec7f6fc > --- /dev/null > +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > @@ -0,0 +1,37 @@ > +NVIDIA Tegra MIPI pad calibration controller > + > +Required properties: > +- compatible: "nvidia,tegra<chip>-mipi" > +- reg: Physical base address and length of the controller's registers. > +- clocks: The clock consumed by the controller. > +- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads > + that need to be calibrated for a given device. Is there a case that this would not be set to 1? If so, why bother with the property right now? One would assume for a non-1 case a new compatible will be required anyways. > + > +User nodes need to contain an nvidia,mipi-calibrate property that has a > +phandle to refer to the calibration controller node and a bitmask of the pads > +that need to be calibrated. > + > +Example: > + > + mipi: mipi@700e3000 { > + compatible = "nvidia,tegra114-mipi"; > + reg = <0x700e3000 0x100>; > + clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>; > + #nvidia,mipi-calibrate-cells = <1>; > + }; > + > + ... > + > + host1x@50000000 { > + ... > + > + dsi@54300000 { > + ... > + > + nvidia,mipi-calibrate = <&mipi 0x060>; > + > + ... > + }; > + > + ... > + }; > -- > 1.8.4.2 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 02, 2013 at 11:38:59AM -0600, Kumar Gala wrote: > > On Dec 2, 2013, at 7:28 AM, Thierry Reding <thierry.reding@gmail.com> wrote: > > > Introduce device tree bindings for the MIPI pad calibration controller > > found on Tegra SoCs. The controller can be used to perform calibration > > of pads used for DSI and CSI peripherals. > > > > Signed-off-by: Thierry Reding <treding@nvidia.com> > > --- > > .../bindings/misc/nvidia,tegra114-mipi.txt | 37 ++++++++++++++++++++++ > > Should this just be nvidia,tegra-mipi.txt (as you have it supported > for tegra<chip>)? Tegra114 is the first chip to support it. Subsequent chips should be backwards-compatible. But it's probably safer to change the compatible property documentation to only include nvidia,tegra114-mipi for now. Newer SoC generations can always be added when support for them is added. > > 1 file changed, 37 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > > Is this really pad control or pin? I ask as its rare to see pad control. It's not really control at all. Rather it is a hardware block that performs calibration to obtain the optimal parameters for a given set of pads. Since you mention it, is there a better location for this file? I couldn't find anything that matched, so I just put it here. I suppose I could add it to Documentation/devicetree/bindings/gpu where the rest of the bindings reside for the Tegra GPU, but this block is also used by CSI, which is a capture interface and not really related to the GPU at all. > > diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > > new file mode 100644 > > index 000000000000..beb75ec7f6fc > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > > @@ -0,0 +1,37 @@ > > +NVIDIA Tegra MIPI pad calibration controller > > + > > +Required properties: > > +- compatible: "nvidia,tegra<chip>-mipi" > > +- reg: Physical base address and length of the controller's registers. > > +- clocks: The clock consumed by the controller. > > +- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads > > + that need to be calibrated for a given device. > > Is there a case that this would not be set to 1? If so, why bother > with the property right now? One would assume for a non-1 case a new > compatible will be required anyways. There is no such case now, and I'm not aware of a future chip that has more than 32 pads and would therefore require this to be anything other than 1. However having this property allows the DT to be parsed without specific knowledge about the hardware block. If this was implied by the value of the compatible property, a generic parser wouldn't know how to interpret the data. A schema validator wouldn't be able to check that the content was correct either. Thierry
On Mon, Dec 02, 2013 at 02:28:54PM +0100, Thierry Reding wrote: [...] > + host1x@50000000 { > + ... > + > + dsi@54300000 { > + ... > + > + nvidia,mipi-calibrate = <&mipi 0x060>; I just occurred to me that perhaps having a list of pad indices here would be easier to write and parse than a bitmask. So alternatively this could be: nvidia,mipi-calibrate = <&mipi 5>, <&mipi 6>; Thierry
On 12/02/2013 06:28 AM, Thierry Reding wrote: > Introduce device tree bindings for the MIPI pad calibration controller > found on Tegra SoCs. The controller can be used to perform calibration > of pads used for DSI and CSI peripherals. > diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > +Required properties: > +- compatible: "nvidia,tegra<chip>-mipi" > +- reg: Physical base address and length of the controller's registers. > +- clocks: The clock consumed by the controller. I'd prefer all our new drivers just use clock-names from the start, so we never have to specify that certain clocks must be at a certain index in the clocks property. How about: + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - mipi (or "cal" or whatever makes sense there) -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Dec 03, 2013 at 01:17:20PM -0700, Stephen Warren wrote: > On 12/02/2013 06:28 AM, Thierry Reding wrote: > > Introduce device tree bindings for the MIPI pad calibration controller > > found on Tegra SoCs. The controller can be used to perform calibration > > of pads used for DSI and CSI peripherals. > > > diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt > > > +Required properties: > > +- compatible: "nvidia,tegra<chip>-mipi" > > +- reg: Physical base address and length of the controller's registers. > > +- clocks: The clock consumed by the controller. > > I'd prefer all our new drivers just use clock-names from the start, so > we never have to specify that certain clocks must be at a certain index > in the clocks property. How about: > > + - clocks: Must contain an entry for each entry in clock-names. > + See ../clocks/clock-bindings.txt for details. > + - clock-names: Must include the following entries: > + - mipi > > (or "cal" or whatever makes sense there) "mipi-cal" sounds like a good name. That's also what the clock is called in the TRM. I'll repost with this fixed up and I'll move this file into the mipi subdirectory that I need for the MIPI DSI DT bindings anyway. Thierry
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt new file mode 100644 index 000000000000..beb75ec7f6fc --- /dev/null +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt @@ -0,0 +1,37 @@ +NVIDIA Tegra MIPI pad calibration controller + +Required properties: +- compatible: "nvidia,tegra<chip>-mipi" +- reg: Physical base address and length of the controller's registers. +- clocks: The clock consumed by the controller. +- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads + that need to be calibrated for a given device. + +User nodes need to contain an nvidia,mipi-calibrate property that has a +phandle to refer to the calibration controller node and a bitmask of the pads +that need to be calibrated. + +Example: + + mipi: mipi@700e3000 { + compatible = "nvidia,tegra114-mipi"; + reg = <0x700e3000 0x100>; + clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>; + #nvidia,mipi-calibrate-cells = <1>; + }; + + ... + + host1x@50000000 { + ... + + dsi@54300000 { + ... + + nvidia,mipi-calibrate = <&mipi 0x060>; + + ... + }; + + ... + };
Introduce device tree bindings for the MIPI pad calibration controller found on Tegra SoCs. The controller can be used to perform calibration of pads used for DSI and CSI peripherals. Signed-off-by: Thierry Reding <treding@nvidia.com> --- .../bindings/misc/nvidia,tegra114-mipi.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/nvidia,tegra114-mipi.txt