From patchwork Tue May 21 09:10:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 245230 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44AEE2C00AD for ; Tue, 21 May 2013 19:17:51 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752116Ab3EUJRu (ORCPT ); Tue, 21 May 2013 05:17:50 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:4656 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751972Ab3EUJRu (ORCPT ); Tue, 21 May 2013 05:17:50 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 21 May 2013 02:12:48 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 21 May 2013 02:12:47 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 21 May 2013 02:12:47 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.298.1; Tue, 21 May 2013 02:12:47 -0700 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Tue, 21 May 2013 02:12:47 -0700 Received: from oreo.Nvidia.com ([10.21.25.255]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r4L9ArmC004969; Tue, 21 May 2013 02:12:45 -0700 (PDT) From: Hiroshi Doyu To: CC: , , , Hiroshi Doyu Subject: [v2 6/6] ARM: tegra114: convert device tree files to use CLK defines Date: Tue, 21 May 2013 12:10:50 +0300 Message-ID: <1369127450-15203-7-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1369127450-15203-1-git-send-email-hdoyu@nvidia.com> References: <1369127450-15203-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu --- arch/arm/boot/dts/tegra114-dalmore.dts | 4 +- arch/arm/boot/dts/tegra114.dtsi | 79 +++++++++++++++++++--------------- 2 files changed, 47 insertions(+), 36 deletions(-) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 680f0a8..3a4c4ce 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -972,7 +972,9 @@ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; - clocks = <&tegra_car 216>, <&tegra_car 217>, <&tegra_car 120>; + clocks = <&tegra_car TEGRA114_CLK_PLL_A>, + <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA114_CLK_EXTERN1>; clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 15d1b58..4ce77ba 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -1,3 +1,4 @@ +#include #include #include @@ -35,7 +36,7 @@ , , ; - clocks = <&tegra_car 5>; + clocks = <&tegra_car TEGRA114_CLK_TIMER>; }; tegra_car: clock { @@ -79,7 +80,7 @@ , , ; - clocks = <&tegra_car 34>; + clocks = <&tegra_car TEGRA114_CLK_APBDMA>; }; ahb: ahb { @@ -125,7 +126,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 8>; status = "disabled"; - clocks = <&tegra_car 6>; + clocks = <&tegra_car TEGRA114_CLK_UARTA>; }; uartb: serial@70006040 { @@ -135,7 +136,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 9>; status = "disabled"; - clocks = <&tegra_car 192>; + clocks = <&tegra_car TEGRA114_CLK_UARTB>; }; uartc: serial@70006200 { @@ -145,7 +146,7 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 10>; status = "disabled"; - clocks = <&tegra_car 55>; + clocks = <&tegra_car TEGRA114_CLK_UARTC>; }; uartd: serial@70006300 { @@ -155,14 +156,14 @@ interrupts = ; nvidia,dma-request-selector = <&apbdma 19>; status = "disabled"; - clocks = <&tegra_car 65>; + clocks = <&tegra_car TEGRA114_CLK_UARTD>; }; pwm: pwm { compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>; #pwm-cells = <2>; - clocks = <&tegra_car 17>; + clocks = <&tegra_car TEGRA114_CLK_PWM>; status = "disabled"; }; @@ -172,7 +173,7 @@ interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 12>; + clocks = <&tegra_car TEGRA114_CLK_I2C1>; clock-names = "div-clk"; status = "disabled"; }; @@ -183,7 +184,7 @@ interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 54>; + clocks = <&tegra_car TEGRA114_CLK_I2C2>; clock-names = "div-clk"; status = "disabled"; }; @@ -194,7 +195,7 @@ interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 67>; + clocks = <&tegra_car TEGRA114_CLK_I2C3>; clock-names = "div-clk"; status = "disabled"; }; @@ -205,7 +206,7 @@ interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 103>; + clocks = <&tegra_car TEGRA114_CLK_I2C4>; clock-names = "div-clk"; status = "disabled"; }; @@ -216,7 +217,7 @@ interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 47>; + clocks = <&tegra_car TEGRA114_CLK_I2C5>; clock-names = "div-clk"; status = "disabled"; }; @@ -228,7 +229,7 @@ nvidia,dma-request-selector = <&apbdma 15>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 41>; + clocks = <&tegra_car TEGRA114_CLK_SBC1>; clock-names = "spi"; status = "disabled"; }; @@ -240,7 +241,7 @@ nvidia,dma-request-selector = <&apbdma 16>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 44>; + clocks = <&tegra_car TEGRA114_CLK_SBC2>; clock-names = "spi"; status = "disabled"; }; @@ -252,7 +253,7 @@ nvidia,dma-request-selector = <&apbdma 17>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 46>; + clocks = <&tegra_car TEGRA114_CLK_SBC3>; clock-names = "spi"; status = "disabled"; }; @@ -264,7 +265,7 @@ nvidia,dma-request-selector = <&apbdma 18>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 68>; + clocks = <&tegra_car TEGRA114_CLK_SBC4>; clock-names = "spi"; status = "disabled"; }; @@ -276,7 +277,7 @@ nvidia,dma-request-selector = <&apbdma 27>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 104>; + clocks = <&tegra_car TEGRA114_CLK_SBC5>; clock-names = "spi"; status = "disabled"; }; @@ -288,7 +289,7 @@ nvidia,dma-request-selector = <&apbdma 28>; #address-cells = <1>; #size-cells = <0>; - clocks = <&tegra_car 105>; + clocks = <&tegra_car TEGRA114_CLK_SBC6>; clock-names = "spi"; status = "disabled"; }; @@ -297,21 +298,21 @@ compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc"; reg = <0x7000e000 0x100>; interrupts = ; - clocks = <&tegra_car 4>; + clocks = <&tegra_car TEGRA114_CLK_RTC>; }; kbc { compatible = "nvidia,tegra114-kbc"; reg = <0x7000e200 0x100>; interrupts = ; - clocks = <&tegra_car 36>; + clocks = <&tegra_car TEGRA114_CLK_KBC>; status = "disabled"; }; pmc { compatible = "nvidia,tegra114-pmc"; reg = <0x7000e400 0x400>; - clocks = <&tegra_car 261>, <&clk32k_in>; + clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; }; @@ -336,11 +337,19 @@ <&apbdma 3>, <&apbdma 4>, <&apbdma 6>, <&apbdma 7>, <&apbdma 12>, <&apbdma 13>, <&apbdma 14>, <&apbdma 29>; - clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>, - <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>, - <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>, - <&tegra_car 110>, <&tegra_car 194>, <&tegra_car 153>, - <&tegra_car 154>; + clocks = <&tegra_car TEGRA114_CLK_D_AUDIO>, + <&tegra_car TEGRA114_CLK_APBIF>, + <&tegra_car TEGRA114_CLK_I2S0>, + <&tegra_car TEGRA114_CLK_I2S1>, + <&tegra_car TEGRA114_CLK_I2S2>, + <&tegra_car TEGRA114_CLK_I2S3>, + <&tegra_car TEGRA114_CLK_I2S4>, + <&tegra_car TEGRA114_CLK_DAM0>, + <&tegra_car TEGRA114_CLK_DAM1>, + <&tegra_car TEGRA114_CLK_DAM2>, + <&tegra_car TEGRA114_CLK_SPDIF_IN>, + <&tegra_car TEGRA114_CLK_AMX>, + <&tegra_car TEGRA114_CLK_ADX>; clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2", "i2s3", "i2s4", "dam0", "dam1", "dam2", "spdif_in", "amx", "adx"; @@ -352,7 +361,7 @@ compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s"; reg = <0x70080300 0x100>; nvidia,ahub-cif-ids = <4 4>; - clocks = <&tegra_car 30>; + clocks = <&tegra_car TEGRA114_CLK_I2S0>; status = "disabled"; }; @@ -360,7 +369,7 @@ compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s"; reg = <0x70080400 0x100>; nvidia,ahub-cif-ids = <5 5>; - clocks = <&tegra_car 11>; + clocks = <&tegra_car TEGRA114_CLK_I2S1>; status = "disabled"; }; @@ -368,7 +377,7 @@ compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s"; reg = <0x70080500 0x100>; nvidia,ahub-cif-ids = <6 6>; - clocks = <&tegra_car 18>; + clocks = <&tegra_car TEGRA114_CLK_I2S2>; status = "disabled"; }; @@ -376,7 +385,7 @@ compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s"; reg = <0x70080600 0x100>; nvidia,ahub-cif-ids = <7 7>; - clocks = <&tegra_car 101>; + clocks = <&tegra_car TEGRA114_CLK_I2S3>; status = "disabled"; }; @@ -384,7 +393,7 @@ compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s"; reg = <0x70080700 0x100>; nvidia,ahub-cif-ids = <8 8>; - clocks = <&tegra_car 102>; + clocks = <&tegra_car TEGRA114_CLK_I2S4>; status = "disabled"; }; }; @@ -393,7 +402,7 @@ compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000000 0x200>; interrupts = ; - clocks = <&tegra_car 14>; + clocks = <&tegra_car TEGRA114_CLK_SDMMC1>; status = "disable"; }; @@ -401,7 +410,7 @@ compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000200 0x200>; interrupts = ; - clocks = <&tegra_car 9>; + clocks = <&tegra_car TEGRA114_CLK_SDMMC2>; status = "disable"; }; @@ -409,7 +418,7 @@ compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000400 0x200>; interrupts = ; - clocks = <&tegra_car 69>; + clocks = <&tegra_car TEGRA114_CLK_SDMMC3>; status = "disable"; }; @@ -417,7 +426,7 @@ compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; reg = <0x78000600 0x200>; interrupts = ; - clocks = <&tegra_car 15>; + clocks = <&tegra_car TEGRA114_CLK_SDMMC4>; status = "disable"; };