diff mbox

ARM: tegra: emc: correction of ram-code parsing from dt

Message ID 1368390409-14156-1-git-send-email-digetx@gmail.com
State Accepted, archived
Headers show

Commit Message

Dmitry Osipenko May 12, 2013, 8:26 p.m. UTC
Change tegra_emc_ramcode_devnode() to get ram-code from child node instead of
parent.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
For me it looks like it should be better to place ram-code inside of table
nodes, so num_tables will be incremented if table has valid ram-code and table
with invalid ram-code will be skipped on getting table params loop. This avoids
placing of #address-cells and #size-cells in nodes with ram-code.
If it looks ok, I may send new patch.

 arch/arm/mach-tegra/tegra2_emc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Stephen Warren May 17, 2013, 11:53 p.m. UTC | #1
On 05/12/2013 02:26 PM, Dmitry Osipenko wrote:
> Change tegra_emc_ramcode_devnode() to get ram-code from child node instead of
> parent.

I've applied this to Tegra's for-3.11/soc branch.

> For me it looks like it should be better to place ram-code inside of table
> nodes, so num_tables will be incremented if table has valid ram-code and table
> with invalid ram-code will be skipped on getting table params loop. This avoids
> placing of #address-cells and #size-cells in nodes with ram-code.
> If it looks ok, I may send new patch.

That would be a change to the DT binding. DT bindings are supposed to be
a stable ABI, so we wouldn't want to change the binding unless there was
a strong reason. I don't think there is one here.

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Dmitry Osipenko May 20, 2013, 10:06 a.m. UTC | #2
18.05.2013 03:53, Stephen Warren пишет:
> On 05/12/2013 02:26 PM, Dmitry Osipenko wrote:
>> Change tegra_emc_ramcode_devnode() to get ram-code from child node instead of
>> parent.
> 
> I've applied this to Tegra's for-3.11/soc branch.
> 

Thanks.

>> For me it looks like it should be better to place ram-code inside of table
>> nodes, so num_tables will be incremented if table has valid ram-code and table
>> with invalid ram-code will be skipped on getting table params loop. This avoids
>> placing of #address-cells and #size-cells in nodes with ram-code.
>> If it looks ok, I may send new patch.
> 
> That would be a change to the DT binding. DT bindings are supposed to be
> a stable ABI, so we wouldn't want to change the binding unless there was
> a strong reason. I don't think there is one here.
> 

Ok.
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diff mbox

Patch

diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 9e8bdfa..25f0189 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -183,7 +183,7 @@  static struct device_node *tegra_emc_ramcode_devnode(struct device_node *np)
 	u32 reg;
 
 	for_each_child_of_node(np, iter) {
-		if (of_property_read_u32(np, "nvidia,ram-code", &reg))
+		if (of_property_read_u32(iter, "nvidia,ram-code", &reg))
 			continue;
 		if (reg == tegra_bct_strapping)
 			return of_node_get(iter);