diff mbox

[v3,03/10] ARM: tegra: update device trees for USB binding rework

Message ID 1368194051-4925-4-git-send-email-vbyravarasu@nvidia.com
State Superseded, archived
Headers show

Commit Message

Venu Byravarasu May 10, 2013, 1:54 p.m. UTC 
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.

The only exception is otg property which was removed, as VBUS details
for all the boards are not known. This should not affect for those boards
in any way, as otg is not really supported in Tegra20 USB driver, though
it was set in DT properties.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
---
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.

delta from v2:
1. Removed dr_mode setting to otg, due to:
  a. Any ways existing Tegra USB driver does not support OTG.
  b. lack of knowledge of all Vbus supplies, on all target platforms.
Once real OTG support is added to Tegra USB driver, then this property can be
 set back to otg, for target platforms.

2. All changes related to 'nvidia,phy-reset-gpio' were moved to patch 2 of the
 same series.

 arch/arm/boot/dts/tegra20-iris-512.dts  |    1 -
 arch/arm/boot/dts/tegra20-seaboard.dts  |   14 +++++++++-
 arch/arm/boot/dts/tegra20-trimslice.dts |   13 +++++++++
 arch/arm/boot/dts/tegra20-whistler.dts  |   26 +++++++++++++++++
 arch/arm/boot/dts/tegra20.dtsi          |   46 +++++++++++++++++++++++--------
 5 files changed, 86 insertions(+), 14 deletions(-)

Comments

Stephen Warren May 13, 2013, 5:29 p.m. UTC | #1 
On 05/10/2013 07:54 AM, Venu Byravarasu wrote:
> This patch updates all Tegra board files so that they contain all the
> properties required by the updated USB DT binding. Note that this patch
> only adds the new properties and does not yet remove the old properties,
> in order to maintain bisectability. The old properties will be removed
> once the driver has been updated to assume the new bindings.
> 
> The only exception is otg property which was removed, as VBUS details
> for all the boards are not known. This should not affect for those boards
> in any way, as otg is not really supported in Tegra20 USB driver, though

I would change "really" to "yet" here. I hope one day it will be...

> delta from v2:
> 1. Removed dr_mode setting to otg, due to:
>   a. Any ways existing Tegra USB driver does not support OTG.

The DT should be describing the HW, and not be related to what some
particular driver currently supports...

>   b. lack of knowledge of all Vbus supplies, on all target platforms.

Hence, this part of the change should only be applied to those boards
where we don't know the details of the VBUS supply. For example, Iris
512. For Seaboard, we do know all the required information, so there's
no need to make this change.

> diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts

>  	usb@c5000000 {
>  		status = "okay";
>  		nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
> -		dr_mode = "otg";

You don't need to make that change ...

> +	};
> +
> +	usb-phy@c5000000 {
> +		vbus-supply = <&vbus_reg>;

Since we have all the details we need in order to define vbus-supply here.

> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi

> -	phy1: usb-phy@c5000400 {
> +	phy1: usb-phy@c5000000 {

One last change throughout this file: the PHY nodes in tegra20.dtsi
should all be marked with:

	status = "disabled";

... just like the EHCI nodes already are. This ensures that the devices
aren't activated on boards where those PHYs and EHCI controllers are not
used.

You will also need to add:

	status = "okay";

to the top of all PHY nodes in all board .dts files where those PHYs are
used; you can tell which boards need them because those boards will also
set that status property for the relevant EHCI nodes.
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..b7f71e8 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -38,7 +38,6 @@ 
 
 	usb@c5000000 {
 		status = "okay";
-		dr_mode = "otg";
 	};
 
 	usb@c5008000 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 9dd4f8e..d51e969 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -566,7 +566,10 @@ 
 	usb@c5000000 {
 		status = "okay";
 		nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
-		dr_mode = "otg";
+	};
+
+	usb-phy@c5000000 {
+		vbus-supply = <&vbus_reg>;
 	};
 
 	usb@c5004000 {
@@ -807,6 +810,15 @@ 
 			gpio = <&pmic 1 0>;
 			enable-active-high;
 		};
+
+		vbus_reg: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "vdd_5v0";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio 24 0>; /* PD0 */
+		};
 	};
 
 	sound {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index fd7afd6..85699f0 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -314,6 +314,10 @@ 
 		nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */
 	};
 
+	usb-phy@c5000000 {
+		vbus-supply = <&vbus_reg>;
+	};
+
 	usb@c5004000 {
 		status = "okay";
 		nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */
@@ -390,6 +394,15 @@ 
 			regulator-max-microvolt = <1800000>;
 			regulator-always-on;
 		};
+
+		vbus_reg: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "vdd_5v0";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio 170 0>; /* PV2 */
+		};
 	};
 
 	sound {
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index d2567f8..9aec63a 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -511,11 +511,19 @@ 
 		nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
 	};
 
+	usb-phy@c5000000 {
+		vbus-supply = <&vbus_reg1>;
+	};
+
 	usb@c5008000 {
 		status = "okay";
 		nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
 	};
 
+	usb-phy@c5008000 {
+		vbus-supply = <&vbus_reg2>;
+	};
+
 	sdhci@c8000400 {
 		status = "okay";
 		cd-gpios = <&gpio 69 1>; /* gpio PI5 */
@@ -568,6 +576,24 @@ 
 			regulator-max-microvolt = <5000000>;
 			regulator-always-on;
 		};
+
+		vbus_reg1: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "vdd_5v0";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
+		};
+
+		vbus_reg2: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "vdd_5v0";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
+		};
 	};
 
 	sound {
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 56a9110..62ea419 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -455,13 +455,23 @@ 
 		status = "disabled";
 	};
 
-	phy1: usb-phy@c5000400 {
+	phy1: usb-phy@c5000000 {
 		compatible = "nvidia,tegra20-usb-phy";
-		reg = <0xc5000400 0x3c00>;
+		reg = <0xc5000000 0x4000 0xc5000000 0x4000>;
 		phy_type = "utmi";
+		clocks = <&tegra_car 22>,
+			 <&tegra_car 127>,
+			 <&tegra_car 106>,
+			 <&tegra_car 22>;
+		clock-names = "reg", "pll_u", "timer", "utmi-pads";
 		nvidia,has-legacy-mode;
-		clocks = <&tegra_car 22>, <&tegra_car 127>;
-		clock-names = "phy", "pll_u";
+		hssync_start_delay = <9>;
+		idle_wait_delay = <17>;
+		elastic_limit = <16>;
+		term_range_adj = <6>;
+		xcvr_setup = <9>;
+		xcvr_lsfslew = <1>;
+		xcvr_lsrslew = <1>;
 	};
 
 	usb@c5004000 {
@@ -474,12 +484,14 @@ 
 		status = "disabled";
 	};
 
-	phy2: usb-phy@c5004400 {
+	phy2: usb-phy@c5004000 {
 		compatible = "nvidia,tegra20-usb-phy";
-		reg = <0xc5004400 0x3c00>;
+		reg = <0xc5004000 0x4000>;
 		phy_type = "ulpi";
-		clocks = <&tegra_car 93>, <&tegra_car 127>;
-		clock-names = "phy", "pll_u";
+		clocks = <&tegra_car 58>,
+			 <&tegra_car 127>,
+			 <&tegra_car 93>;
+		clock-names = "reg", "pll_u", "ulpi-link";
 	};
 
 	usb@c5008000 {
@@ -492,12 +504,22 @@ 
 		status = "disabled";
 	};
 
-	phy3: usb-phy@c5008400 {
+	phy3: usb-phy@c5008000 {
 		compatible = "nvidia,tegra20-usb-phy";
-		reg = <0xc5008400 0x3c00>;
+		reg = <0xc5008000 0x4000 0xc5000000 0x4000>;
 		phy_type = "utmi";
-		clocks = <&tegra_car 22>, <&tegra_car 127>;
-		clock-names = "phy", "pll_u";
+		clocks = <&tegra_car 59>,
+			 <&tegra_car 127>,
+			 <&tegra_car 106>,
+			 <&tegra_car 22>;
+		clock-names = "reg", "pll_u", "timer", "utmi-pads";
+		hssync_start_delay = <9>;
+		idle_wait_delay = <17>;
+		elastic_limit = <16>;
+		term_range_adj = <6>;
+		xcvr_setup = <9>;
+		xcvr_lsfslew = <2>;
+		xcvr_lsrslew = <2>;
 	};
 
 	sdhci@c8000000 {