diff mbox

[V5,1/9] gpio: tegra: add gpio wakeup source handling

Message ID 1364901613-25080-2-git-send-email-josephl@nvidia.com
State Superseded, archived
Headers show

Commit Message

Joseph Lo April 2, 2013, 11:20 a.m. UTC
This patch add the gpio wakeup source handling for the Tegra platform. It
was be done by enabling the irq for the gpio in the gpio controller and
enabling the bank irq of the gpio in the Tegra legacy irq controller when
the system going to suspend.

Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
---
V5:
* no change
V4:
* no change
V3:
* no change
V2:
* no change
---
 drivers/gpio/gpio-tegra.c | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

Comments

Linus Walleij April 3, 2013, 4:29 p.m. UTC | #1
On Tue, Apr 2, 2013 at 1:20 PM, Joseph Lo <josephl@nvidia.com> wrote:
> This patch ad
d the gpio wakeup source handling for the Tegra platform. It
> was be done by enabling the irq for the gpio in the gpio controller and
> enabling the bank irq of the gpio in the Tegra legacy irq controller when
> the system going to suspend.
>
> Based on the work by:
> Varun Wadekar <vwadekar@nvidia.com>
>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> V5:
> * no change
> V4:
> * no change
> V3:
> * no change
> V2:
> * no change

Shall I just apply this to the GPIO tree to stop these repetitive mails
from coming?

Yours,
Linus Walleij
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Stephen Warren April 3, 2013, 4:52 p.m. UTC | #2
On 04/03/2013 10:29 AM, Linus Walleij wrote:
> On Tue, Apr 2, 2013 at 1:20 PM, Joseph Lo <josephl@nvidia.com> wrote:
>> This patch ad
> d the gpio wakeup source handling for the Tegra platform. It
>> was be done by enabling the irq for the gpio in the gpio controller and
>> enabling the bank irq of the gpio in the Tegra legacy irq controller when
>> the system going to suspend.
>>
>> Based on the work by:
>> Varun Wadekar <vwadekar@nvidia.com>
>>
>> Cc: Grant Likely <grant.likely@secretlab.ca>
>> Cc: Linus Walleij <linus.walleij@linaro.org>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
>> V5:
>> * no change
>> V4:
>> * no change
>> V3:
>> * no change
>> V2:
>> * no change
> 
> Shall I just apply this to the GPIO tree to stop these repetitive mails
> from coming?

It's part of a series where other patches are being rev'd. I'll apply it
to the Tegra tree with the series once it's final.

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Stephen Warren April 3, 2013, 9:20 p.m. UTC | #3
On 04/03/2013 10:52 AM, Stephen Warren wrote:
> On 04/03/2013 10:29 AM, Linus Walleij wrote:
>> On Tue, Apr 2, 2013 at 1:20 PM, Joseph Lo <josephl@nvidia.com> wrote:
>>> This patch ad
>> d the gpio wakeup source handling for the Tegra platform. It
>>> was be done by enabling the irq for the gpio in the gpio controller and
>>> enabling the bank irq of the gpio in the Tegra legacy irq controller when
>>> the system going to suspend.
>>>
>>> Based on the work by:
>>> Varun Wadekar <vwadekar@nvidia.com>
>>>
>>> Cc: Grant Likely <grant.likely@secretlab.ca>
>>> Cc: Linus Walleij <linus.walleij@linaro.org>
>>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>>> ---
>>> V5:
>>> * no change
>>> V4:
>>> * no change
>>> V3:
>>> * no change
>>> V2:
>>> * no change
>>
>> Shall I just apply this to the GPIO tree to stop these repetitive mails
>> from coming?
> 
> It's part of a series where other patches are being rev'd. I'll apply it
> to the Tegra tree with the series once it's final.

By the way, it's checked in now, so there won't be any more versions posted.

I guess I should have just applied this patch in an earlier iteration
since it was ack'd and only later patches in the series needed changes.
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diff mbox

Patch

diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index a78a81f..2f1b265 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -72,6 +72,7 @@  struct tegra_gpio_bank {
 	u32 oe[4];
 	u32 int_enb[4];
 	u32 int_lvl[4];
+	u32 wake_enb[4];
 #endif
 };
 
@@ -333,15 +334,31 @@  static int tegra_gpio_suspend(struct device *dev)
 			bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio));
 			bank->int_enb[p] = tegra_gpio_readl(GPIO_INT_ENB(gpio));
 			bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio));
+
+			/* Enable gpio irq for wake up source */
+			tegra_gpio_writel(bank->wake_enb[p],
+					  GPIO_INT_ENB(gpio));
 		}
 	}
 	local_irq_restore(flags);
 	return 0;
 }
 
-static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
+static int tegra_gpio_irq_set_wake(struct irq_data *d, unsigned int enable)
 {
 	struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
+	int gpio = d->hwirq;
+	u32 port, bit, mask;
+
+	port = GPIO_PORT(gpio);
+	bit = GPIO_BIT(gpio);
+	mask = BIT(bit);
+
+	if (enable)
+		bank->wake_enb[port] |= mask;
+	else
+		bank->wake_enb[port] &= ~mask;
+
 	return irq_set_irq_wake(bank->irq, enable);
 }
 #endif
@@ -353,7 +370,7 @@  static struct irq_chip tegra_gpio_irq_chip = {
 	.irq_unmask	= tegra_gpio_irq_unmask,
 	.irq_set_type	= tegra_gpio_irq_set_type,
 #ifdef CONFIG_PM_SLEEP
-	.irq_set_wake	= tegra_gpio_wake_enable,
+	.irq_set_wake	= tegra_gpio_irq_set_wake,
 #endif
 };