diff mbox

ARM: dt: tegra: cardhu: Add drm components

Message ID 1353042045-3182-1-git-send-email-markz@nvidia.com
State Superseded, archived
Headers show

Commit Message

Mark Zhang Nov. 16, 2012, 5 a.m. UTC
This patch adds the rgb and hdmi nodes which are necessary for
tegra drm driver.

Signed-off-by: Mark Zhang <markz@nvidia.com>
---
 arch/arm/boot/dts/tegra30-cardhu.dtsi |   23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

Comments

Stephen Warren Nov. 16, 2012, 4:46 p.m. UTC | #1
On 11/15/2012 10:00 PM, Mark Zhang wrote:
> This patch adds the rgb and hdmi nodes which are necessary for
> tegra drm driver.

> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi

> +	host1x {
> +		dc@54200000 {
> +			rgb {
> +				status = "okay";
> +				nvidia,ddc-i2c-bus = <&rgbddc>;
> +			};
> +		};
> +
> +		hdmi {
> +			status = "okay";
...
> +		};
> +	};

This patch enables both LCD (which will always get enabled, since
there's no way to unplug it) and HDMI (which may optionally get enabled,
depending on whether an HDMI device is plugged in). tegradrm currently
has issues when two outputs are enabled at once (and I just validated
this is still true with all the latest patches). As such, please can you
repost with only the internal LCD enabled. We can enable the LCD port
later once the tegradrm issues are fixed. Thanks.

With no HDMI plugged in, I tested Cardhu's LCD and it works fine.
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index bdb2a66..9af6987 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -27,6 +27,25 @@ 
 	model = "NVIDIA Tegra30 Cardhu evaluation board";
 	compatible = "nvidia,cardhu", "nvidia,tegra30";
 
+	host1x {
+		dc@54200000 {
+			rgb {
+				status = "okay";
+				nvidia,ddc-i2c-bus = <&rgbddc>;
+			};
+		};
+
+		hdmi {
+			status = "okay";
+
+			vdd-supply = <&sys_3v3_reg>;
+			pll-supply = <&vio_reg>;
+
+			nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+			nvidia,ddc-i2c-bus = <&hdmiddc>;
+		};
+	};
+
 	memory {
 		reg = <0x80000000 0x40000000>;
 	};
@@ -114,7 +133,7 @@ 
 		clock-frequency = <408000000>;
 	};
 
-	i2c@7000c000 {
+	rgbddc: i2c@7000c000 {
 		status = "okay";
 		clock-frequency = <100000>;
 	};
@@ -137,7 +156,7 @@ 
 		};
 	};
 
-	i2c@7000c700 {
+	hdmiddc: i2c@7000c700 {
 		status = "okay";
 		clock-frequency = <100000>;
 	};