Message ID | 1531396813-6581-1-git-send-email-avienamo@nvidia.com |
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Headers | show
Return-Path: <linux-tegra-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41RDzx0HzKz9s1R for <incoming@patchwork.ozlabs.org>; Thu, 12 Jul 2018 22:01:17 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727057AbeGLMJe (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Thu, 12 Jul 2018 08:09:34 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:16188 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726696AbeGLMJd (ORCPT <rfc822;linux-tegra@vger.kernel.org>); Thu, 12 Jul 2018 08:09:33 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1, AES128-SHA) id <B5b4742a50000>; Thu, 12 Jul 2018 04:59:33 -0700 Received: from HQMAIL107.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 12 Jul 2018 05:00:18 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 12 Jul 2018 05:00:18 -0700 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 12 Jul 2018 12:00:18 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Thu, 12 Jul 2018 12:00:18 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id <B5b4742d00002>; Thu, 12 Jul 2018 05:00:18 -0700 From: Aapo Vienamo <avienamo@nvidia.com> To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Mikko Perttunen <mperttunen@nvidia.com>, Laxman Dewangan <ldewangan@nvidia.com> CC: Aapo Vienamo <avienamo@nvidia.com>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v3 0/7] Tegra PMC pinctrl pad configuration Date: Thu, 12 Jul 2018 15:00:06 +0300 Message-ID: <1531396813-6581-1-git-send-email-avienamo@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: <linux-tegra.vger.kernel.org> X-Mailing-List: linux-tegra@vger.kernel.org |
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Tegra PMC pinctrl pad configuration
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