From patchwork Tue Jan 9 07:17:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Preetham Chandru Ramchandra X-Patchwork-Id: 857261 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zG3Pv0NVgz9s82 for ; Tue, 9 Jan 2018 18:17:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751465AbeAIHRx (ORCPT ); Tue, 9 Jan 2018 02:17:53 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12069 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750786AbeAIHRw (ORCPT ); Tue, 9 Jan 2018 02:17:52 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Mon, 08 Jan 2018 23:18:06 -0800 Received: from HQMAIL103.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Mon, 08 Jan 2018 23:18:49 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Mon, 08 Jan 2018 23:18:49 -0800 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 9 Jan 2018 07:17:52 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Tue, 9 Jan 2018 07:17:52 +0000 Received: from pchandru-pc.nvidia.com (Not Verified[10.24.37.8]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 08 Jan 2018 23:17:50 -0800 From: Preetham Chandru Ramchandra To: , , CC: , , , , , Preetham Ramchandra Subject: [PATCH V6 0/7] Refactor and add AHCI support for tegra210 Date: Tue, 9 Jan 2018 12:47:07 +0530 Message-ID: <1515482234-24716-1-git-send-email-pchandru@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Preetham Ramchandra 1. ADD AHCI support for tegra210 2. Extend the tegra AHCI controller device tree binding with tegra210 3. Update initialization sequence 4. Initialize regulators based on chip 5. Disable DevSlp 6. Disable DIPM --- Preetham Ramchandra (7): dt-bindings: tegra: add binding documentation arm64: tegra: Enable AHCI on Jetson TX1 ata: ahci_tegra: Update initialization sequence ata: ahci_tegra: initialize regulators from soc_data ata: ahci_tegra: disable devslp for t124 ata: ahci_tegra: disable DIPM ata: ahci_tegra: Add AHCI support for tegra210 .../bindings/ata/nvidia,tegra124-ahci.txt | 38 ++- arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 6 + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 16 + drivers/ata/ahci_tegra.c | 362 ++++++++++++++++----- 4 files changed, 332 insertions(+), 90 deletions(-)