| Message ID | 20251008-ipq-pwm-v17-1-9bd43edfc7f7@outlook.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add PWM support for IPQ chipsets | expand |
Hi George, On Wed, Oct 08 2025, George Moussalem via B4 Relay wrote: > From: Devi Priya <quic_devipriy@quicinc.com> > > DT binding for the PWM block in Qualcomm IPQ6018 SoC. > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Co-developed-by: Baruch Siach <baruch.siach@siklu.com> > Signed-off-by: Baruch Siach <baruch.siach@siklu.com> > Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> > --- > .../devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml | 44 ++++++++++++++++++++++ > 1 file changed, 44 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml > b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..1172f0b53fadc140482f9384a36020260df372b7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml > @@ -0,0 +1,44 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/qcom,ipq6018-pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm IPQ6018 PWM controller > + > +maintainers: > + - Baruch Siach <baruch@tkos.co.il> Unfortunately I have no access to this PWM hardware anymore. I don't think I can maintain hardware DT binding. baruch > + > +properties: > + compatible: > + const: qcom,ipq6018-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + "#pwm-cells": > + const: 2 > + > +required: > + - compatible > + - reg > + - clocks > + - "#pwm-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> > + > + pwm: pwm@1941010 { > + compatible = "qcom,ipq6018-pwm"; > + reg = <0x01941010 0x20>; > + clocks = <&gcc GCC_ADSS_PWM_CLK>; > + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; > + assigned-clock-rates = <100000000>; > + #pwm-cells = <2>; > + };
Hi Baruch, On 10/8/25 20:08, Baruch Siach wrote: > Hi George, > > On Wed, Oct 08 2025, George Moussalem via B4 Relay wrote: >> From: Devi Priya <quic_devipriy@quicinc.com> >> >> DT binding for the PWM block in Qualcomm IPQ6018 SoC. >> >> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> Co-developed-by: Baruch Siach <baruch.siach@siklu.com> >> Signed-off-by: Baruch Siach <baruch.siach@siklu.com> >> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> >> --- >> .../devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml | 44 ++++++++++++++++++++++ >> 1 file changed, 44 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml >> b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml >> new file mode 100644 >> index 0000000000000000000000000000000000000000..1172f0b53fadc140482f9384a36020260df372b7 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml >> @@ -0,0 +1,44 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pwm/qcom,ipq6018-pwm.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm IPQ6018 PWM controller >> + >> +maintainers: >> + - Baruch Siach <baruch@tkos.co.il> > > Unfortunately I have no access to this PWM hardware anymore. I don't > think I can maintain hardware DT binding. > > baruch Got it, thanks. Will add myself as maintainer in next version. I've tried contacting Devi too but got an NDR. George> >> + >> +properties: >> + compatible: >> + const: qcom,ipq6018-pwm >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + "#pwm-cells": >> + const: 2 >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - "#pwm-cells" >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> >> + >> + pwm: pwm@1941010 { >> + compatible = "qcom,ipq6018-pwm"; >> + reg = <0x01941010 0x20>; >> + clocks = <&gcc GCC_ADSS_PWM_CLK>; >> + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; >> + assigned-clock-rates = <100000000>; >> + #pwm-cells = <2>; >> + }; >
On Wed, Oct 08, 2025 at 07:32:53PM +0400, George Moussalem via B4 Relay wrote: > From: Devi Priya <quic_devipriy@quicinc.com> > > DT binding for the PWM block in Qualcomm IPQ6018 SoC. > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Co-developed-by: Baruch Siach <baruch.siach@siklu.com> > Signed-off-by: Baruch Siach <baruch.siach@siklu.com> > Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Thanks for your work on this, George. We need your Signed-off-by here as well though. How about squashing the later additions to this same file, to avoid repeatedly changing the file you introduce here, in this same series? You can document your contribution by adding a line [george: Added compatibles for X, Y, Z] before your signed-off-by. Regards, Bjorn > --- > .../devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml | 44 ++++++++++++++++++++++ > 1 file changed, 44 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..1172f0b53fadc140482f9384a36020260df372b7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml > @@ -0,0 +1,44 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/qcom,ipq6018-pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm IPQ6018 PWM controller > + > +maintainers: > + - Baruch Siach <baruch@tkos.co.il> > + > +properties: > + compatible: > + const: qcom,ipq6018-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + "#pwm-cells": > + const: 2 > + > +required: > + - compatible > + - reg > + - clocks > + - "#pwm-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> > + > + pwm: pwm@1941010 { > + compatible = "qcom,ipq6018-pwm"; > + reg = <0x01941010 0x20>; > + clocks = <&gcc GCC_ADSS_PWM_CLK>; > + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; > + assigned-clock-rates = <100000000>; > + #pwm-cells = <2>; > + }; > > -- > 2.51.0 > >
diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..1172f0b53fadc140482f9384a36020260df372b7 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/qcom,ipq6018-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ6018 PWM controller + +maintainers: + - Baruch Siach <baruch@tkos.co.il> + +properties: + compatible: + const: qcom,ipq6018-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq6018.h> + + pwm: pwm@1941010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0x01941010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + };