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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1759327463; bh=Pi8UCkwgJIEOdVhZWtrj0Uu7QhaUGHxfSoe/0iViBsQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=SPnF481bRUsR+gspp1H7c7FoBsi2sp1mhFut3RZ+O9XpW8nU8e5495pzHmTi773vQ EtfGr0sKZkekLd3NBU2AT2GTOhHQ6KZRPlWXM2GlGY12ScmJ/mMG2lFNGA+XAnJla7 IHgdnn1eOMWPpUGLkCb+51ZSBowDSejAvKZXL9hLTNrWxTn4xK8znDYVah6Ww2dyFH sjvYXrXmqkK8SwcOG7Caq7hd45dyVNz7tV0vGpYYq5kA3rteyC/LAut0Ku646lB2an uiKSxgcnsuHx/gMxgko7/xMd7cCFMDhkYN9H/0e+iba+/WKzxM/2YxkrQxh0RWvMjh NjzJaJqltNniw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60F55CAC5BB; Wed, 1 Oct 2025 14:04:23 +0000 (UTC) From: George Moussalem via B4 Relay Date: Wed, 01 Oct 2025 18:04:24 +0400 Subject: [PATCH v16 8/9] arm64: dts: qcom: ipq5332: add pwm node Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20251001-ipq-pwm-v16-8-300f237e0e68@outlook.com> References: <20251001-ipq-pwm-v16-0-300f237e0e68@outlook.com> In-Reply-To: <20251001-ipq-pwm-v16-0-300f237e0e68@outlook.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Baruch Siach , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1759327459; l=1186; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=KvYbb087e0IlFv5OJiQl0AaX3Z3Wvu4mRV8HcggrQbU=; b=Ah/Gp1IRi9I3RMtMSorPmK/+gcsW3TwS7R/hNSgj/sNzrA7Tu6dkcYzMMxwReGloAXjEVZhP8 mSOlAuQdzujCMwH1mc5aqE8mwyfl1f3od1bKV1NL9p6SYyR3BwOwbI/ X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Describe the PWM block on IPQ5332. Although PWM is in the TCSR area, make pwm its own node as simple-mfd has been removed from the bindings and as such hardware components should have its own node. Signed-off-by: George Moussalem Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 45fc512a3bab221c0d99f819294abf63369987da..4ff6e38521ed94fac0f4caac5c5b0d9be3704d7e 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -334,6 +334,16 @@ tcsr: syscon@1937000 { reg = <0x01937000 0x21000>; }; + pwm: pwm@1941010 { + compatible = "qcom,ipq5332-pwm", "qcom,ipq6018-pwm"; + reg = <0x01941010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + sdhc: mmc@7804000 { compatible = "qcom,ipq5332-sdhci", "qcom,sdhci-msm-v5"; reg = <0x07804000 0x1000>, <0x07805000 0x1000>;