| Message ID | 20250429085048.1310409-5-guodong@riscstar.com |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | pwm: Update PWM_PXA driver for SpacemiT K1 | expand |
On Tue, Apr 29, 2025 at 04:50:46PM +0800, Guodong Xu wrote: > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > index 283663647a86..195eb8874f3c 100644 > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > @@ -20,4 +20,11 @@ uart0-2-pins { > drive-strength = <32>; > }; > }; > + pwm14_1_cfg: pwm14-1-cfg { > + pwm14-1-pins { > + pinmux = <K1_PADCONF(44, 4)>; > + bias-pull-up = <0>; > + drive-strength = <32>; > + }; > + }; There is a newline expected before the pwm14-1-cfg node, isn't there? Best regards Uwe
Hi Guodong, Uwe, On 18:54 Mon 26 May , Uwe Kleine-König wrote: > On Tue, Apr 29, 2025 at 04:50:46PM +0800, Guodong Xu wrote: > > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > index 283663647a86..195eb8874f3c 100644 > > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > @@ -20,4 +20,11 @@ uart0-2-pins { > > drive-strength = <32>; > > }; > > }; > > + pwm14_1_cfg: pwm14-1-cfg { > > + pwm14-1-pins { > > + pinmux = <K1_PADCONF(44, 4)>; > > + bias-pull-up = <0>; > > + drive-strength = <32>; > > + }; > > + }; > > There is a newline expected before the pwm14-1-cfg node, isn't there? > Right, I could amend this and fix it while applying this patch (so if there is no other serious issue, no need to resend)
On Tue, May 27, 2025 at 5:52 AM Yixun Lan <dlan@gentoo.org> wrote: > > Hi Guodong, Uwe, > > On 18:54 Mon 26 May , Uwe Kleine-König wrote: > > On Tue, Apr 29, 2025 at 04:50:46PM +0800, Guodong Xu wrote: > > > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > index 283663647a86..195eb8874f3c 100644 > > > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > @@ -20,4 +20,11 @@ uart0-2-pins { > > > drive-strength = <32>; > > > }; > > > }; > > > + pwm14_1_cfg: pwm14-1-cfg { > > > + pwm14-1-pins { > > > + pinmux = <K1_PADCONF(44, 4)>; > > > + bias-pull-up = <0>; > > > + drive-strength = <32>; > > > + }; > > > + }; > > > > There is a newline expected before the pwm14-1-cfg node, isn't there? > > > Right, I could amend this and fix it while applying this patch > (so if there is no other serious issue, no need to resend) > Thanks, Yixun. By the way, do you plan to take patches 3 and 4 of this series into your tree? They only apply if the SpacemiT reset patchset is applied first. BR, Guodong > -- > Yixun Lan (dlan)
Hi Guodong, On 10:48 Tue 27 May , Guodong Xu wrote: > On Tue, May 27, 2025 at 5:52 AM Yixun Lan <dlan@gentoo.org> wrote: > > > > Hi Guodong, Uwe, > > > > On 18:54 Mon 26 May , Uwe Kleine-König wrote: > > > On Tue, Apr 29, 2025 at 04:50:46PM +0800, Guodong Xu wrote: > > > > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > > index 283663647a86..195eb8874f3c 100644 > > > > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > > @@ -20,4 +20,11 @@ uart0-2-pins { > > > > drive-strength = <32>; > > > > }; > > > > }; > > > > + pwm14_1_cfg: pwm14-1-cfg { > > > > + pwm14-1-pins { > > > > + pinmux = <K1_PADCONF(44, 4)>; > > > > + bias-pull-up = <0>; > > > > + drive-strength = <32>; > > > > + }; > > > > + }; > > > > > > There is a newline expected before the pwm14-1-cfg node, isn't there? > > > > > Right, I could amend this and fix it while applying this patch > > (so if there is no other serious issue, no need to resend) > > > > Thanks, Yixun. > > By the way, do you plan to take patches 3 and 4 of this series into > your tree? They only apply if the SpacemiT reset patchset is applied > first. > Yes, exactly. The dts patch will go through SpacemiT SoC tree, and we have to wait untill reset patch series applied.
On Tue, May 27, 2025 at 11:27 AM Yixun Lan <dlan@gentoo.org> wrote: > > Hi Guodong, > > On 10:48 Tue 27 May , Guodong Xu wrote: > > On Tue, May 27, 2025 at 5:52 AM Yixun Lan <dlan@gentoo.org> wrote: > > > > > > Hi Guodong, Uwe, > > > > > > On 18:54 Mon 26 May , Uwe Kleine-König wrote: > > > > On Tue, Apr 29, 2025 at 04:50:46PM +0800, Guodong Xu wrote: > > > > > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > > > index 283663647a86..195eb8874f3c 100644 > > > > > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > > > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > > > > > @@ -20,4 +20,11 @@ uart0-2-pins { > > > > > drive-strength = <32>; > > > > > }; > > > > > }; > > > > > + pwm14_1_cfg: pwm14-1-cfg { > > > > > + pwm14-1-pins { > > > > > + pinmux = <K1_PADCONF(44, 4)>; > > > > > + bias-pull-up = <0>; > > > > > + drive-strength = <32>; > > > > > + }; > > > > > + }; > > > > > > > > There is a newline expected before the pwm14-1-cfg node, isn't there? > > > > > > > Right, I could amend this and fix it while applying this patch > > > (so if there is no other serious issue, no need to resend) > > > > > > > Thanks, Yixun. > > > > By the way, do you plan to take patches 3 and 4 of this series into > > your tree? They only apply if the SpacemiT reset patchset is applied > > first. > > > Yes, exactly. The dts patch will go through SpacemiT SoC tree, and we > have to wait untill reset patch series applied. > Appreciate you taking care of this, and thanks for the update. > -- > Yixun Lan (dlan)
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi index 283663647a86..195eb8874f3c 100644 --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi @@ -20,4 +20,11 @@ uart0-2-pins { drive-strength = <32>; }; }; + pwm14_1_cfg: pwm14-1-cfg { + pwm14-1-pins { + pinmux = <K1_PADCONF(44, 4)>; + bias-pull-up = <0>; + drive-strength = <32>; + }; + }; };
This patch adds the option 1 (hence the name pwm14_1) pinctrl configuration for PWM14 on the SpacemiT K1 SoC. PWM14 option 1 is used for PWM-based backlight control on MIPI displays. This configuration is present on all existing K1 development boards, such as the Banana Pi BPI-F3 and the Milk-V Jupiter. For reference, a more complete list of PWM0-PWM19 pinctrl configurations including all options can be found in [1]. Note: Since the corresponding functionality for other pins is not yet in use or ready for upstreaming, this patch includes only the pwm14_1 setting. [1] https://lore.kernel.org/all/20250411131423.3802611-7-guodong@riscstar.com/ Signed-off-by: Guodong Xu <guodong@riscstar.com> --- v3: No change v2: Discard pwm0-pwm19 pinctrl configurations, and adds only pwm14_1_cfg arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)