| Message ID | 20221111192942.717137-3-biju.das.jz@bp.renesas.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add support for linking gpt with poeg | expand |
On Fri, 11 Nov 2022 19:29:41 +0000, Biju Das wrote: > RZ/G2L GPT IP supports output pin disable function by dead time > error and detecting short-circuits between output pins. > > Add documentation for the optional property renesas,poegs to > link a pair of GPT IOs with POEG. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v1->v2: > * removed quotes from ref > * Added maxItems and minItems for renesas,poegs property > * Added enums for gpt index > --- > .../bindings/pwm/renesas,rzg2l-gpt.yaml | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml: properties:renesas,poegs:items: 'oneOf' conditional failed, one must be fixed: {'maxItems': 8, 'minItems': 1, 'items': [{'description': 'phandle to POEG instance that serves the output disable'}, {'enum': [0, 1, 2, 3, 4, 5, 6, 7], 'description': 'An index identifying pair of GPT channels.\n <0> : GPT channels 0 and 1\n <1> : GPT channels 2 and 3\n <2> : GPT channels 4 and 5\n <3> : GPT channels 6 and 7\n <4> : GPT channels 8 and 9\n <5> : GPT channels 10 and 11\n <6> : GPT channels 12 and 13\n <7> : GPT channels 14 and 15\n'}]} should not be valid under {'required': ['maxItems']} hint: "maxItems" is not needed with an "items" list {'maxItems': 8, 'minItems': 1, 'items': [{'description': 'phandle to POEG instance that serves the output disable'}, {'enum': [0, 1, 2, 3, 4, 5, 6, 7], 'description': 'An index identifying pair of GPT channels.\n <0> : GPT channels 0 and 1\n <1> : GPT channels 2 and 3\n <2> : GPT channels 4 and 5\n <3> : GPT channels 6 and 7\n <4> : GPT channels 8 and 9\n <5> : GPT channels 10 and 11\n <6> : GPT channels 12 and 13\n <7> : GPT channels 14 and 15\n'}]} is not of type 'array' from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
Hi Rob and Krzysztof Kozlowski, > Subject: Re: [PATCH v2 2/3] dt-bindings: pwm: rzg2l-gpt: Document > renesas,poegs property > > > On Fri, 11 Nov 2022 19:29:41 +0000, Biju Das wrote: > > RZ/G2L GPT IP supports output pin disable function by dead time error > > and detecting short-circuits between output pins. > > > > Add documentation for the optional property renesas,poegs to link a > > pair of GPT IOs with POEG. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v1->v2: > > * removed quotes from ref > > * Added maxItems and minItems for renesas,poegs property > > * Added enums for gpt index > > --- > > .../bindings/pwm/renesas,rzg2l-gpt.yaml | 23 +++++++++++++++++++ > > 1 file changed, 23 insertions(+) > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review- > ci/linux/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml: > properties:renesas,poegs:items: 'oneOf' conditional failed, one must be > fixed: > {'maxItems': 8, 'minItems': 1, 'items': [{'description': 'phandle to > POEG instance that serves the output disable'}, {'enum': [0, 1, 2, 3, 4, 5, > 6, 7], 'description': 'An index identifying pair of GPT channels.\n <0> : > GPT channels 0 and 1\n <1> : GPT channels 2 and 3\n <2> : GPT channels 4 > and 5\n <3> : GPT channels 6 and 7\n <4> : GPT channels 8 and 9\n <5> : > GPT channels 10 and 11\n <6> : GPT channels 12 and 13\n <7> : GPT channels > 14 and 15\n'}]} should not be valid under {'required': ['maxItems']} > hint: "maxItems" is not needed with an "items" list > {'maxItems': 8, 'minItems': 1, 'items': [{'description': 'phandle to > POEG instance that serves the output disable'}, {'enum': [0, 1, 2, 3, 4, 5, > 6, 7], 'description': 'An index identifying pair of GPT channels.\n <0> : > GPT channels 0 and 1\n <1> : GPT channels 2 and 3\n <2> : GPT channels 4 > and 5\n <3> : GPT channels 6 and 7\n <4> : GPT channels 8 and 9\n <5> : > GPT channels 10 and 11\n <6> : GPT channels 12 and 13\n <7> : GPT channels > 14 and 15\n'}]} is not of type 'array' > from schema $id: > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above error(s), > then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. I am able to reproduce the issue reported by bot[1]. Looks like we should not add maxItems for Items. The check is passing, if we just add minItems for Items. Please let me know shall I drop maxItems and just add minItems with an "items" list? Or Drop both from "items" list. [1] ~/dt-binding-check.sh Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml bindings file ### Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml #### checking bindings LINT Documentation/devicetree/bindings CHKDT Documentation/devicetree/bindings/processed-schema.json /home/biju/renesas-devel/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml: properties:renesas,poegs:items: 'oneOf' conditional failed, one must be fixed: {'maxItems': 8, 'minItems': 1, 'items': [{'description': 'phandle to POEG instance that serves the output disable'}, {'enum': [0, 1, 2, 3, 4, 5, 6, 7], 'description': 'An index identifying pair of GPT channels.\n <0> : GPT channels 0 and 1\n <1> : GPT channels 2 and 3\n <2> : GPT channels 4 and 5\n <3> : GPT channels 6 and 7\n <4> : GPT channels 8 and 9\n <5> : GPT channels 10 and 11\n <6> : GPT channels 12 and 13\n <7> : GPT channels 14 and 15\n'}]} should not be valid under {'required': ['maxItems']} hint: "maxItems" is not needed with an "items" list {'maxItems': 8, 'minItems': 1, 'items': [{'description': 'phandle to POEG instance that serves the output disable'}, {'enum': [0, 1, 2, 3, 4, 5, 6, 7], 'description': 'An index identifying pair of GPT channels.\n <0> : GPT channels 0 and 1\n <1> : GPT channels 2 and 3\n <2> : GPT channels 4 and 5\n <3> : GPT channels 6 and 7\n <4> : GPT channels 8 and 9\n <5> : GPT channels 10 and 11\n <6> : GPT channels 12 and 13\n <7> : GPT channels 14 and 15\n'}]} is not of type 'array' from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# SCHEMA Documentation/devicetree/bindings/processed-schema.json DTC_CHK Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.example.dtb Cheers, Biju
On Fri, Nov 11, 2022 at 07:29:41PM +0000, Biju Das wrote: > RZ/G2L GPT IP supports output pin disable function by dead time > error and detecting short-circuits between output pins. > > Add documentation for the optional property renesas,poegs to > link a pair of GPT IOs with POEG. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v1->v2: > * removed quotes from ref > * Added maxItems and minItems for renesas,poegs property > * Added enums for gpt index > --- > .../bindings/pwm/renesas,rzg2l-gpt.yaml | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > index 620d5ae4ae30..5219032c60ee 100644 > --- a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > +++ b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > @@ -245,6 +245,28 @@ properties: > resets: > maxItems: 1 > > + renesas,poegs: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + maxItems: 8 > + minItems: 1 I think you want these moved up a level with the 1st 'items'. It's 1-8 tuples, right? > + items: > + - description: phandle to POEG instance that serves the output disable > + - enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] > + description: | > + An index identifying pair of GPT channels. > + <0> : GPT channels 0 and 1 > + <1> : GPT channels 2 and 3 > + <2> : GPT channels 4 and 5 > + <3> : GPT channels 6 and 7 > + <4> : GPT channels 8 and 9 > + <5> : GPT channels 10 and 11 > + <6> : GPT channels 12 and 13 > + <7> : GPT channels 14 and 15 > + description: > + A list of phandle and channel index pair tuples to the POEGs that handle the > + output disable for the GPT channels. > + > required: > - compatible > - reg > @@ -375,4 +397,5 @@ examples: > power-domains = <&cpg>; > resets = <&cpg R9A07G044_GPT_RST_C>; > #pwm-cells = <2>; > + renesas,poegs = <&poeggd 4>; > }; > -- > 2.25.1 > >
Hi Rob, > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 15 November 2022 01:46 > To: Biju Das <biju.das.jz@bp.renesas.com> > Cc: Thierry Reding <thierry.reding@gmail.com>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@linaro.org>; Uwe Kleine-König <u.kleine- > koenig@pengutronix.de>; linux-pwm@vger.kernel.org; > devicetree@vger.kernel.org; Geert Uytterhoeven > <geert+renesas@glider.be>; Chris Paterson > <Chris.Paterson2@renesas.com>; Prabhakar Mahadev Lad > <prabhakar.mahadev-lad.rj@bp.renesas.com>; linux-renesas- > soc@vger.kernel.org > Subject: Re: [PATCH v2 2/3] dt-bindings: pwm: rzg2l-gpt: Document > renesas,poegs property > > On Fri, Nov 11, 2022 at 07:29:41PM +0000, Biju Das wrote: > > RZ/G2L GPT IP supports output pin disable function by dead time > error > > and detecting short-circuits between output pins. > > > > Add documentation for the optional property renesas,poegs to link a > > pair of GPT IOs with POEG. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v1->v2: > > * removed quotes from ref > > * Added maxItems and minItems for renesas,poegs property > > * Added enums for gpt index > > --- > > .../bindings/pwm/renesas,rzg2l-gpt.yaml | 23 > +++++++++++++++++++ > > 1 file changed, 23 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > > b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > > index 620d5ae4ae30..5219032c60ee 100644 > > --- a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > > +++ b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml > > @@ -245,6 +245,28 @@ properties: > > resets: > > maxItems: 1 > > > > + renesas,poegs: > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + items: > > + maxItems: 8 > > + minItems: 1 > > I think you want these moved up a level with the 1st 'items'. It's 1-8 > tuples, right? Yes, I want something like below, so that a gpt channel can be linked to a poeggroup. renesas,poegs = <&poegga 0>, <&poeggb 1>, <&poegga 2>, <&poeggd 4>, <&poeggb 5>; Thanks, I moved this up a level and the checks are now passing. renesas,poegs: + maxItems: 8 + minItems: 1 $ref: /schemas/types.yaml#/definitions/phandle-array items: - maxItems: 8 - minItems: 1 Cheers, Biju > > > + items: > > + - description: phandle to POEG instance that serves the > output disable > > + - enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] > > + description: | > > + An index identifying pair of GPT channels. > > + <0> : GPT channels 0 and 1 > > + <1> : GPT channels 2 and 3 > > + <2> : GPT channels 4 and 5 > > + <3> : GPT channels 6 and 7 > > + <4> : GPT channels 8 and 9 > > + <5> : GPT channels 10 and 11 > > + <6> : GPT channels 12 and 13 > > + <7> : GPT channels 14 and 15 > > + description: > > + A list of phandle and channel index pair tuples to the POEGs > that handle the > > + output disable for the GPT channels. > > + > > required: > > - compatible > > - reg > > @@ -375,4 +397,5 @@ examples: > > power-domains = <&cpg>; > > resets = <&cpg R9A07G044_GPT_RST_C>; > > #pwm-cells = <2>; > > + renesas,poegs = <&poeggd 4>; > > }; > > -- > > 2.25.1 > > > >
diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml index 620d5ae4ae30..5219032c60ee 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml @@ -245,6 +245,28 @@ properties: resets: maxItems: 1 + renesas,poegs: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 8 + minItems: 1 + items: + - description: phandle to POEG instance that serves the output disable + - enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] + description: | + An index identifying pair of GPT channels. + <0> : GPT channels 0 and 1 + <1> : GPT channels 2 and 3 + <2> : GPT channels 4 and 5 + <3> : GPT channels 6 and 7 + <4> : GPT channels 8 and 9 + <5> : GPT channels 10 and 11 + <6> : GPT channels 12 and 13 + <7> : GPT channels 14 and 15 + description: + A list of phandle and channel index pair tuples to the POEGs that handle the + output disable for the GPT channels. + required: - compatible - reg @@ -375,4 +397,5 @@ examples: power-domains = <&cpg>; resets = <&cpg R9A07G044_GPT_RST_C>; #pwm-cells = <2>; + renesas,poegs = <&poeggd 4>; };
RZ/G2L GPT IP supports output pin disable function by dead time error and detecting short-circuits between output pins. Add documentation for the optional property renesas,poegs to link a pair of GPT IOs with POEG. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v1->v2: * removed quotes from ref * Added maxItems and minItems for renesas,poegs property * Added enums for gpt index --- .../bindings/pwm/renesas,rzg2l-gpt.yaml | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+)