@@ -24,6 +24,8 @@
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_data/x86/pwm-lpss.h>
+
#include "../core.h"
#include "pinctrl-intel.h"
@@ -49,6 +51,8 @@
#define PADOWN_MASK(p) (GENMASK(3, 0) << PADOWN_SHIFT(p))
#define PADOWN_GPP(p) ((p) / 8)
+#define PWMC 0x204
+
/* Offset from pad_regs */
#define PADCFG0 0x000
#define PADCFG0_RXEVCFG_SHIFT 25
@@ -1494,6 +1498,27 @@ static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
return 0;
}
+static int intel_pinctrl_probe_pwm(struct intel_pinctrl *pctrl,
+ struct intel_community *community)
+{
+ static const struct pwm_lpss_boardinfo info = {
+ .clk_rate = 19200000,
+ .npwm = 1,
+ .base_unit_bits = 22,
+ .bypass = true,
+ };
+ struct pwm_lpss_chip *pwm;
+
+ if (!(community->features & PINCTRL_FEATURE_PWM))
+ return 0;
+
+ pwm = pwm_lpss_probe(pctrl->dev, community->regs + PWMC, &info);
+ if (IS_ERR(pwm) && PTR_ERR(pwm) != -ENODEV)
+ return PTR_ERR(pwm);
+
+ return 0;
+}
+
int intel_pinctrl_probe(struct platform_device *pdev,
const struct intel_pinctrl_soc_data *soc_data)
{
@@ -1592,6 +1617,10 @@ int intel_pinctrl_probe(struct platform_device *pdev,
ret = intel_pinctrl_add_padgroups_by_size(pctrl, community);
if (ret)
return ret;
+
+ ret = intel_pinctrl_probe_pwm(pctrl, community);
+ if (ret)
+ return ret;
}
irq = platform_get_irq(pdev, 0);
Some of the Communities may have PWM capability. In such cases, enumerate PWM device via respective driver. User is still responsible for setting correct pin muxing for the line that needs to output the signal. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- drivers/pinctrl/intel/pinctrl-intel.c | 29 +++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)