diff mbox series

[5/7] pwm: sifive: Simplify clk handling

Message ID 20220721103129.304697-5-u.kleine-koenig@pengutronix.de
State Accepted
Headers show
Series [1/7] pwm: sifive: Simplify offset calculation for PWMCMP registers | expand

Commit Message

Uwe Kleine-König July 21, 2022, 10:31 a.m. UTC
The clk is necessary for both register access and (enabled) operation of
the PWM. Instead of

	clk_enable()
	update_hw()
	if pwm_got_enabled():
		clk_enable()
	elif pwm_got_disabled():
		clk_disable()
	clk_disable()

which is some cases only calls clk_enable() to immediately afterwards
call clk_disable again, do:

	if (!prev_state.enabled)
		clk_enable()

	# clk enabled exactly once

	update_hw()

	if (!next_state.enabled)
		clk_disable()

which is much easier.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 drivers/pwm/pwm-sifive.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)
diff mbox series

Patch

diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c
index d833536b5e7a..34d23d56fa25 100644
--- a/drivers/pwm/pwm-sifive.c
+++ b/drivers/pwm/pwm-sifive.c
@@ -168,24 +168,24 @@  static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 	}
 	mutex_unlock(&ddata->lock);
 
-	ret = clk_enable(ddata->clk);
-	if (ret) {
-		dev_err(ddata->chip.dev, "Enable clk failed\n");
-		return ret;
+	/*
+	 * If the PWM is enabled the clk is already on. So only enable it
+	 * conditionally to have it on exactly once afterwards independent of
+	 * the PWM state.
+	 */
+	if (!enabled) {
+		ret = clk_enable(ddata->clk);
+		if (ret) {
+			dev_err(ddata->chip.dev, "Enable clk failed\n");
+			return ret;
+		}
 	}
 
 	writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm));
 
-	if (state->enabled != enabled) {
-		if (state->enabled) {
-			if (clk_enable(ddata->clk))
-				dev_err(ddata->chip.dev, "Enable clk failed\n");
-		} else {
-			clk_disable(ddata->clk);
-		}
-	}
+	if (!state->enabled)
+		clk_disable(ddata->clk);
 
-	clk_disable(ddata->clk);
 	return 0;
 }