From patchwork Mon May 10 14:06:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 1476497 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Ff3pm3YTVz9sX2 for ; Tue, 11 May 2021 00:49:04 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237404AbhEJOuG (ORCPT ); Mon, 10 May 2021 10:50:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240109AbhEJOsw (ORCPT ); Mon, 10 May 2021 10:48:52 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 315DEC06138E for ; Mon, 10 May 2021 07:06:45 -0700 (PDT) Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lg6YV-0006xJ-5v; Mon, 10 May 2021 16:06:43 +0200 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1lg6YU-0001sq-Rn; Mon, 10 May 2021 16:06:42 +0200 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Thierry Reding , Lee Jones Cc: linux-pwm@vger.kernel.org, kernel@pengutronix.de Subject: [PATCH v2 3/4] pwm: Autodetect default value for of_pwm_n_cells from device tree Date: Mon, 10 May 2021 16:06:39 +0200 Message-Id: <20210510140640.980100-4-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210510140640.980100-1-u.kleine-koenig@pengutronix.de> References: <20210510140640.980100-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-pwm@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This allows to simplify all drivers that use three pwm-cells. The only ugly side effect is that if a driver specified of_pwm_n_cells = 2 it suddenly supports device trees that use #pwm-cells = <3>. This however isn't a bad thing because the driver doesn't need explicit support for three cells as the core handles all the details. Also there is no such in-tree driver. Signed-off-by: Uwe Kleine-König --- drivers/pwm/core.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c index 9eb7ab19dbfb..33cf05a47770 100644 --- a/drivers/pwm/core.c +++ b/drivers/pwm/core.c @@ -159,8 +159,14 @@ static void of_pwmchip_add(struct pwm_chip *chip) return; if (!chip->of_xlate) { + u32 pwm_cells; + + if (of_property_read_u32(chip->dev->of_node, "#pwm-cells", + &pwm_cells)) + pwm_cells = 2; + chip->of_xlate = of_pwm_xlate_with_flags; - chip->of_pwm_n_cells = 2; + chip->of_pwm_n_cells = pwm_cells; } of_node_get(chip->dev->of_node);