From patchwork Wed Jul 25 09:52:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Crispin X-Patchwork-Id: 949095 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=phrozen.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41b9W61LZkz9rxx for ; Wed, 25 Jul 2018 19:52:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728672AbeGYLDM (ORCPT ); Wed, 25 Jul 2018 07:03:12 -0400 Received: from nbd.name ([46.4.11.11]:58856 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728589AbeGYLDM (ORCPT ); Wed, 25 Jul 2018 07:03:12 -0400 From: John Crispin To: Thierry Reding , Rob Herring Cc: Matthias Brugger , linux-pwm@vger.kernel.org, linux-mediatek@lists.infradead.org, John Crispin Subject: [PATCH 1/2] dt-bindings: pwm: Add MT7628 information Date: Wed, 25 Jul 2018 11:52:08 +0200 Message-Id: <20180725095209.10641-1-john@phrozen.org> X-Mailer: git-send-email 2.11.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Enhance the MediaTek PWM binding with details about the IP found in the MT7628 SoC. Signed-off-by: John Crispin --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index ef8bd3cb67ab..991728cb46cb 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -5,11 +5,13 @@ Required properties: - "mediatek,mt2712-pwm": found on mt2712 SoC. - "mediatek,mt7622-pwm": found on mt7622 SoC. - "mediatek,mt7623-pwm": found on mt7623 SoC. + - "mediatek,mt7628-pwm": found on mt7628 SoC. - reg: physical base address and length of the controller's registers. - #pwm-cells: must be 2. See pwm.txt in this directory for a description of the cell format. - clocks: phandle and clock specifier of the PWM reference clock. - - clock-names: must contain the following: + - clock-names: must contain the following, except for MT7628 which + has no clocks - "top": the top clock generator - "main": clock used by the PWM core - "pwm1-8": the eight per PWM clocks for mt2712